mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-08-05 16:54:27 +00:00
bfcee5ee92
The RTL8821AU firmware sends C2H_BT_INFO by itself when bluetooth headphones are connected, but not when they are disconnected. This leads to the coexistence code still using the A2DP algorithm long after the headphones are disconnected, which means the wifi speeds are much lower than they should be. Work around this by asking for updates every two seconds if the chip is RTL8821AU. Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/358acdd2-6aae-46c1-9c66-fcce4e700b96@gmail.com
433 lines
11 KiB
C
433 lines
11 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/* Copyright(c) 2018-2019 Realtek Corporation
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*/
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#ifndef __RTW_COEX_H__
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#define __RTW_COEX_H__
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#define COEX_CCK_2 0x1
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#define COEX_RESP_ACK_BY_WL_FW 0x1
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#define COEX_REQUEST_TIMEOUT msecs_to_jiffies(10)
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#define COEX_MIN_DELAY 10 /* delay unit in ms */
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#define COEX_RFK_TIMEOUT 600 /* RFK timeout in ms */
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#define COEX_BT_GAMEHID_CNT 800
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#define COEX_RF_OFF 0x0
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#define COEX_RF_ON 0x1
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#define COEX_H2C69_WL_LEAKAP 0xc
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#define PARA1_H2C69_DIS_5MS 0x1
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#define PARA1_H2C69_EN_5MS 0x0
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#define COEX_H2C69_TDMA_SLOT 0xb
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#define PARA1_H2C69_TDMA_4SLOT 0xc1
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#define PARA1_H2C69_TDMA_2SLOT 0x1
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#define PARA1_H2C69_TBTT_TIMES GENMASK(5, 0)
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#define PARA1_H2C69_TBTT_DIV100 BIT(7)
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#define COEX_H2C69_TOGGLE_TABLE_A 0xd
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#define COEX_H2C69_TOGGLE_TABLE_B 0x7
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#define TDMA_4SLOT BIT(8)
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#define TDMA_TIMER_TYPE_2SLOT 0
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#define TDMA_TIMER_TYPE_4SLOT 3
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#define COEX_RSSI_STEP 4
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#define COEX_RSSI_HIGH(rssi) \
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({ typeof(rssi) __rssi__ = rssi; \
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(__rssi__ == COEX_RSSI_STATE_HIGH || \
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__rssi__ == COEX_RSSI_STATE_STAY_HIGH ? true : false); })
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#define COEX_RSSI_MEDIUM(rssi) \
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({ typeof(rssi) __rssi__ = rssi; \
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(__rssi__ == COEX_RSSI_STATE_MEDIUM || \
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__rssi__ == COEX_RSSI_STATE_STAY_MEDIUM ? true : false); })
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#define COEX_RSSI_LOW(rssi) \
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({ typeof(rssi) __rssi__ = rssi; \
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(__rssi__ == COEX_RSSI_STATE_LOW || \
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__rssi__ == COEX_RSSI_STATE_STAY_LOW ? true : false); })
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#define GET_COEX_RESP_BT_SUPP_VER(payload) \
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le64_get_bits(*((__le64 *)(payload)), GENMASK_ULL(39, 32))
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#define GET_COEX_RESP_BT_SUPP_FEAT(payload) \
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le64_get_bits(*((__le64 *)(payload)), GENMASK_ULL(39, 24))
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#define GET_COEX_RESP_BT_PATCH_VER(payload) \
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le64_get_bits(*((__le64 *)(payload)), GENMASK_ULL(55, 24))
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#define GET_COEX_RESP_BT_REG_VAL(payload) \
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le64_get_bits(*((__le64 *)(payload)), GENMASK_ULL(39, 24))
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#define GET_COEX_RESP_BT_SCAN_TYPE(payload) \
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le64_get_bits(*((__le64 *)(payload)), GENMASK(31, 24))
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enum coex_mp_info_op {
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BT_MP_INFO_OP_PATCH_VER = 0x00,
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BT_MP_INFO_OP_READ_REG = 0x11,
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BT_MP_INFO_OP_SUPP_FEAT = 0x2a,
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BT_MP_INFO_OP_SUPP_VER = 0x2b,
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BT_MP_INFO_OP_SCAN_TYPE = 0x2d,
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BT_MP_INFO_OP_LNA_CONSTRAINT = 0x32,
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};
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enum coex_set_ant_phase {
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COEX_SET_ANT_INIT,
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COEX_SET_ANT_WONLY,
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COEX_SET_ANT_WOFF,
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COEX_SET_ANT_2G,
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COEX_SET_ANT_5G,
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COEX_SET_ANT_POWERON,
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COEX_SET_ANT_2G_WLBT,
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COEX_SET_ANT_2G_FREERUN,
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COEX_SET_ANT_MAX
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};
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enum coex_runreason {
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COEX_RSN_2GSCANSTART = 0,
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COEX_RSN_5GSCANSTART = 1,
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COEX_RSN_SCANFINISH = 2,
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COEX_RSN_2GSWITCHBAND = 3,
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COEX_RSN_5GSWITCHBAND = 4,
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COEX_RSN_2GCONSTART = 5,
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COEX_RSN_5GCONSTART = 6,
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COEX_RSN_2GCONFINISH = 7,
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COEX_RSN_5GCONFINISH = 8,
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COEX_RSN_2GMEDIA = 9,
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COEX_RSN_5GMEDIA = 10,
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COEX_RSN_MEDIADISCON = 11,
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COEX_RSN_BTINFO = 12,
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COEX_RSN_LPS = 13,
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COEX_RSN_WLSTATUS = 14,
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COEX_RSN_BTSTATUS = 15,
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COEX_RSN_MAX
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};
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enum coex_lte_coex_table_type {
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COEX_CTT_WL_VS_LTE,
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COEX_CTT_BT_VS_LTE,
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};
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enum coex_gnt_setup_state {
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COEX_GNT_SET_HW_PTA = 0x0,
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COEX_GNT_SET_SW_LOW = 0x1,
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COEX_GNT_SET_SW_HIGH = 0x3,
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};
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enum coex_ext_ant_switch_pos_type {
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COEX_SWITCH_TO_BT,
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COEX_SWITCH_TO_WLG,
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COEX_SWITCH_TO_WLA,
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COEX_SWITCH_TO_NOCARE,
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COEX_SWITCH_TO_WLG_BT,
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COEX_SWITCH_TO_MAX
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};
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enum coex_ext_ant_switch_ctrl_type {
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COEX_SWITCH_CTRL_BY_BBSW,
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COEX_SWITCH_CTRL_BY_PTA,
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COEX_SWITCH_CTRL_BY_ANTDIV,
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COEX_SWITCH_CTRL_BY_MAC,
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COEX_SWITCH_CTRL_BY_BT,
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COEX_SWITCH_CTRL_BY_FW,
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COEX_SWITCH_CTRL_MAX
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};
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enum coex_algorithm {
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COEX_ALGO_NOPROFILE = 0,
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COEX_ALGO_HFP = 1,
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COEX_ALGO_HID = 2,
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COEX_ALGO_A2DP = 3,
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COEX_ALGO_PAN = 4,
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COEX_ALGO_A2DP_HID = 5,
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COEX_ALGO_A2DP_PAN = 6,
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COEX_ALGO_PAN_HID = 7,
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COEX_ALGO_A2DP_PAN_HID = 8,
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COEX_ALGO_MAX
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};
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enum coex_bt_profile {
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BPM_NOPROFILE = 0,
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BPM_HFP = BIT(0),
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BPM_HID = BIT(1),
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BPM_A2DP = BIT(2),
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BPM_PAN = BIT(3),
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BPM_HID_HFP = BPM_HID | BPM_HFP,
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BPM_A2DP_HFP = BPM_A2DP | BPM_HFP,
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BPM_A2DP_HID = BPM_A2DP | BPM_HID,
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BPM_A2DP_HID_HFP = BPM_A2DP | BPM_HID | BPM_HFP,
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BPM_PAN_HFP = BPM_PAN | BPM_HFP,
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BPM_PAN_HID = BPM_PAN | BPM_HID,
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BPM_PAN_HID_HFP = BPM_PAN | BPM_HID | BPM_HFP,
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BPM_PAN_A2DP = BPM_PAN | BPM_A2DP,
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BPM_PAN_A2DP_HFP = BPM_PAN | BPM_A2DP | BPM_HFP,
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BPM_PAN_A2DP_HID = BPM_PAN | BPM_A2DP | BPM_HID,
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BPM_PAN_A2DP_HID_HFP = BPM_PAN | BPM_A2DP | BPM_HID | BPM_HFP,
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};
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enum coex_wl_link_mode {
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COEX_WLINK_2G1PORT = 0x0,
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COEX_WLINK_5G = 0x3,
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COEX_WLINK_2GFREE = 0x7,
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COEX_WLINK_MAX
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};
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enum coex_wl2bt_scoreboard {
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COEX_SCBD_ACTIVE = BIT(0),
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COEX_SCBD_ONOFF = BIT(1),
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COEX_SCBD_SCAN = BIT(2),
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COEX_SCBD_UNDERTEST = BIT(3),
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COEX_SCBD_RXGAIN = BIT(4),
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COEX_SCBD_BT_RFK = BIT(5),
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COEX_SCBD_WLBUSY = BIT(6),
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COEX_SCBD_EXTFEM = BIT(8),
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COEX_SCBD_TDMA = BIT(9),
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COEX_SCBD_FIX2M = BIT(10),
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COEX_SCBD_ALL = GENMASK(15, 0),
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};
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enum coex_power_save_type {
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COEX_PS_WIFI_NATIVE = 0,
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COEX_PS_LPS_ON = 1,
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COEX_PS_LPS_OFF = 2,
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};
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enum coex_rssi_state {
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COEX_RSSI_STATE_HIGH,
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COEX_RSSI_STATE_MEDIUM,
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COEX_RSSI_STATE_LOW,
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COEX_RSSI_STATE_STAY_HIGH,
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COEX_RSSI_STATE_STAY_MEDIUM,
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COEX_RSSI_STATE_STAY_LOW,
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};
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enum coex_notify_type_ips {
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COEX_IPS_LEAVE = 0x0,
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COEX_IPS_ENTER = 0x1,
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};
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enum coex_notify_type_lps {
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COEX_LPS_DISABLE = 0x0,
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COEX_LPS_ENABLE = 0x1,
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};
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enum coex_notify_type_scan {
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COEX_SCAN_FINISH,
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COEX_SCAN_START,
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COEX_SCAN_START_2G,
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COEX_SCAN_START_5G,
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};
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enum coex_notify_type_switchband {
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COEX_NOT_SWITCH,
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COEX_SWITCH_TO_24G,
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COEX_SWITCH_TO_5G,
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COEX_SWITCH_TO_24G_NOFORSCAN,
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};
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enum coex_notify_type_associate {
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COEX_ASSOCIATE_FINISH,
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COEX_ASSOCIATE_START,
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COEX_ASSOCIATE_5G_FINISH,
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COEX_ASSOCIATE_5G_START,
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};
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enum coex_notify_type_media_status {
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COEX_MEDIA_DISCONNECT,
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COEX_MEDIA_CONNECT,
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COEX_MEDIA_CONNECT_5G,
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};
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enum coex_bt_status {
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COEX_BTSTATUS_NCON_IDLE = 0,
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COEX_BTSTATUS_CON_IDLE = 1,
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COEX_BTSTATUS_INQ_PAGE = 2,
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COEX_BTSTATUS_ACL_BUSY = 3,
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COEX_BTSTATUS_SCO_BUSY = 4,
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COEX_BTSTATUS_ACL_SCO_BUSY = 5,
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COEX_BTSTATUS_MAX
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};
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enum coex_wl_tput_dir {
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COEX_WL_TPUT_TX = 0x0,
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COEX_WL_TPUT_RX = 0x1,
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COEX_WL_TPUT_MAX
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};
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enum coex_wl_priority_mask {
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COEX_WLPRI_RX_RSP = 2,
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COEX_WLPRI_TX_RSP = 3,
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COEX_WLPRI_TX_BEACON = 4,
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COEX_WLPRI_TX_OFDM = 11,
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COEX_WLPRI_TX_CCK = 12,
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COEX_WLPRI_TX_BEACONQ = 27,
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COEX_WLPRI_RX_CCK = 28,
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COEX_WLPRI_RX_OFDM = 29,
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COEX_WLPRI_MAX
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};
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enum coex_commom_chip_setup {
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COEX_CSETUP_INIT_HW = 0x0,
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COEX_CSETUP_ANT_SWITCH = 0x1,
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COEX_CSETUP_GNT_FIX = 0x2,
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COEX_CSETUP_GNT_DEBUG = 0x3,
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COEX_CSETUP_RFE_TYPE = 0x4,
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COEX_CSETUP_COEXINFO_HW = 0x5,
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COEX_CSETUP_WL_TX_POWER = 0x6,
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COEX_CSETUP_WL_RX_GAIN = 0x7,
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COEX_CSETUP_WLAN_ACT_IPS = 0x8,
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COEX_CSETUP_MAX
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};
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enum coex_indirect_reg_type {
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COEX_INDIRECT_1700 = 0x0,
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COEX_INDIRECT_7C0 = 0x1,
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COEX_INDIRECT_MAX
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};
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enum coex_pstdma_type {
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COEX_PSTDMA_FORCE_LPSOFF = 0x0,
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COEX_PSTDMA_FORCE_LPSON = 0x1,
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COEX_PSTDMA_MAX
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};
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enum coex_btrssi_type {
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COEX_BTRSSI_RATIO = 0x0,
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COEX_BTRSSI_DBM = 0x1,
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COEX_BTRSSI_MAX
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};
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struct coex_table_para {
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u32 bt;
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u32 wl;
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};
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struct coex_tdma_para {
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u8 para[5];
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};
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struct coex_5g_afh_map {
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u32 wl_5g_ch;
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u8 bt_skip_ch;
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u8 bt_skip_span;
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};
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struct coex_rf_para {
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u8 wl_pwr_dec_lvl;
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u8 bt_pwr_dec_lvl;
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bool wl_low_gain_en;
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u8 bt_lna_lvl;
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};
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static inline void rtw_coex_set_init(struct rtw_dev *rtwdev)
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{
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const struct rtw_chip_info *chip = rtwdev->chip;
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chip->ops->coex_set_init(rtwdev);
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}
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static inline
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void rtw_coex_set_ant_switch(struct rtw_dev *rtwdev, u8 ctrl_type, u8 pos_type)
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{
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const struct rtw_chip_info *chip = rtwdev->chip;
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if (!chip->ops->coex_set_ant_switch)
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return;
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chip->ops->coex_set_ant_switch(rtwdev, ctrl_type, pos_type);
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}
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static inline void rtw_coex_set_gnt_fix(struct rtw_dev *rtwdev)
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{
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const struct rtw_chip_info *chip = rtwdev->chip;
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chip->ops->coex_set_gnt_fix(rtwdev);
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}
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static inline void rtw_coex_set_gnt_debug(struct rtw_dev *rtwdev)
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{
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const struct rtw_chip_info *chip = rtwdev->chip;
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chip->ops->coex_set_gnt_debug(rtwdev);
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}
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static inline void rtw_coex_set_rfe_type(struct rtw_dev *rtwdev)
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{
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const struct rtw_chip_info *chip = rtwdev->chip;
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chip->ops->coex_set_rfe_type(rtwdev);
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}
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static inline void rtw_coex_set_wl_tx_power(struct rtw_dev *rtwdev, u8 wl_pwr)
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{
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const struct rtw_chip_info *chip = rtwdev->chip;
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chip->ops->coex_set_wl_tx_power(rtwdev, wl_pwr);
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}
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static inline
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void rtw_coex_set_wl_rx_gain(struct rtw_dev *rtwdev, bool low_gain)
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{
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const struct rtw_chip_info *chip = rtwdev->chip;
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chip->ops->coex_set_wl_rx_gain(rtwdev, low_gain);
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}
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void rtw_coex_info_response(struct rtw_dev *rtwdev, struct sk_buff *skb);
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u32 rtw_coex_read_indirect_reg(struct rtw_dev *rtwdev, u16 addr);
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void rtw_coex_write_indirect_reg(struct rtw_dev *rtwdev, u16 addr,
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u32 mask, u32 val);
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void rtw_coex_write_scbd(struct rtw_dev *rtwdev, u16 bitpos, bool set);
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void rtw_coex_query_bt_info(struct rtw_dev *rtwdev);
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void rtw_coex_bt_relink_work(struct work_struct *work);
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void rtw_coex_bt_reenable_work(struct work_struct *work);
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void rtw_coex_defreeze_work(struct work_struct *work);
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void rtw_coex_wl_remain_work(struct work_struct *work);
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void rtw_coex_bt_remain_work(struct work_struct *work);
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void rtw_coex_wl_connecting_work(struct work_struct *work);
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void rtw_coex_bt_multi_link_remain_work(struct work_struct *work);
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void rtw_coex_wl_ccklock_work(struct work_struct *work);
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void rtw_coex_power_on_setting(struct rtw_dev *rtwdev);
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void rtw_coex_power_off_setting(struct rtw_dev *rtwdev);
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void rtw_coex_init_hw_config(struct rtw_dev *rtwdev, bool wifi_only);
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void rtw_coex_ips_notify(struct rtw_dev *rtwdev, u8 type);
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void rtw_coex_lps_notify(struct rtw_dev *rtwdev, u8 type);
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void rtw_coex_scan_notify(struct rtw_dev *rtwdev, u8 type);
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void rtw_coex_connect_notify(struct rtw_dev *rtwdev, u8 type);
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void rtw_coex_media_status_notify(struct rtw_dev *rtwdev, u8 type);
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void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length);
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void rtw_coex_bt_hid_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length);
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void rtw_coex_wl_fwdbginfo_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length);
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void rtw_coex_switchband_notify(struct rtw_dev *rtwdev, u8 type);
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void rtw_coex_wl_status_change_notify(struct rtw_dev *rtwdev, u32 type);
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void rtw_coex_wl_status_check(struct rtw_dev *rtwdev);
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void rtw_coex_query_bt_hid_list(struct rtw_dev *rtwdev);
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void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m);
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static inline bool rtw_coex_disabled(struct rtw_dev *rtwdev)
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{
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struct rtw_coex *coex = &rtwdev->coex;
|
|
struct rtw_coex_stat *coex_stat = &coex->stat;
|
|
|
|
return coex_stat->bt_disabled;
|
|
}
|
|
|
|
static inline void rtw_coex_active_query_bt_info(struct rtw_dev *rtwdev)
|
|
{
|
|
/* The RTL8821AU firmware doesn't send C2H_BT_INFO by itself
|
|
* when bluetooth headphones are disconnected, so we have to
|
|
* ask for it regularly.
|
|
*/
|
|
if (rtwdev->chip->id == RTW_CHIP_TYPE_8821A && rtwdev->efuse.btcoex)
|
|
rtw_coex_query_bt_info(rtwdev);
|
|
}
|
|
|
|
#endif
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