mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-08-21 06:50:25 +00:00
db5ae2e182
Create the new module rtl8192d-common and move some code into it from rtl8192de. Now the rtl8192de driver (PCI) and the new rtl8192du driver (USB) can share some of the code. This is mostly the code that required little effort to make it shareable. There are a few more functions which they could share, with more changes. Add phy_iq_calibrate member to struct rtl_hal_ops to allow moving the TX power tracking code from dm.c. The other changes in this patch are adjusting whitespace, renaming some functions, making some arrays const, and making checkpatch.pl less unhappy. rtl8192de is compile-tested only. rtl8192d-common is tested with the new rtl8192du driver. Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://msgid.link/69c4358a-6fbf-4433-92a6-341c83e9dd48@gmail.com
184 lines
5.6 KiB
C
184 lines
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2009-2012 Realtek Corporation.*/
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#include "../wifi.h"
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#include "../base.h"
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#include "../core.h"
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#include "../rtl8192d/reg.h"
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#include "../rtl8192d/def.h"
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#include "../rtl8192d/dm_common.h"
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#include "../rtl8192d/phy_common.h"
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#include "../rtl8192d/fw_common.h"
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#include "phy.h"
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#include "dm.h"
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#define UNDEC_SM_PWDB entry_min_undec_sm_pwdb
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static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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rtlpriv->dm.dynamic_txpower_enable = true;
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rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
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rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
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}
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static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_phy *rtlphy = &(rtlpriv->phy);
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struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
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struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
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long undec_sm_pwdb;
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if ((!rtlpriv->dm.dynamic_txpower_enable)
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|| rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
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rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
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return;
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}
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if ((mac->link_state < MAC80211_LINKED) &&
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(rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
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rtl_dbg(rtlpriv, COMP_POWER, DBG_TRACE,
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"Not connected to any\n");
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rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
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rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
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return;
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}
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if (mac->link_state >= MAC80211_LINKED) {
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if (mac->opmode == NL80211_IFTYPE_ADHOC) {
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undec_sm_pwdb =
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rtlpriv->dm.UNDEC_SM_PWDB;
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rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
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"IBSS Client PWDB = 0x%lx\n",
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undec_sm_pwdb);
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} else {
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undec_sm_pwdb =
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rtlpriv->dm.undec_sm_pwdb;
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rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
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"STA Default Port PWDB = 0x%lx\n",
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undec_sm_pwdb);
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}
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} else {
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undec_sm_pwdb =
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rtlpriv->dm.UNDEC_SM_PWDB;
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rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
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"AP Ext Port PWDB = 0x%lx\n",
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undec_sm_pwdb);
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}
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if (rtlhal->current_bandtype == BAND_ON_5G) {
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if (undec_sm_pwdb >= 0x33) {
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rtlpriv->dm.dynamic_txhighpower_lvl =
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TXHIGHPWRLEVEL_LEVEL2;
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rtl_dbg(rtlpriv, COMP_HIPWR, DBG_LOUD,
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"5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
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} else if ((undec_sm_pwdb < 0x33)
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&& (undec_sm_pwdb >= 0x2b)) {
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rtlpriv->dm.dynamic_txhighpower_lvl =
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TXHIGHPWRLEVEL_LEVEL1;
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rtl_dbg(rtlpriv, COMP_HIPWR, DBG_LOUD,
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"5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
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} else if (undec_sm_pwdb < 0x2b) {
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rtlpriv->dm.dynamic_txhighpower_lvl =
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TXHIGHPWRLEVEL_NORMAL;
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rtl_dbg(rtlpriv, COMP_HIPWR, DBG_LOUD,
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"5G:TxHighPwrLevel_Normal\n");
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}
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} else {
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if (undec_sm_pwdb >=
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TX_POWER_NEAR_FIELD_THRESH_LVL2) {
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rtlpriv->dm.dynamic_txhighpower_lvl =
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TXHIGHPWRLEVEL_LEVEL2;
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rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
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"TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
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} else
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if ((undec_sm_pwdb <
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(TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
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&& (undec_sm_pwdb >=
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TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
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rtlpriv->dm.dynamic_txhighpower_lvl =
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TXHIGHPWRLEVEL_LEVEL1;
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rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
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"TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
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} else if (undec_sm_pwdb <
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(TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
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rtlpriv->dm.dynamic_txhighpower_lvl =
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TXHIGHPWRLEVEL_NORMAL;
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rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
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"TXHIGHPWRLEVEL_NORMAL\n");
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}
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}
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if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
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rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
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"PHY_SetTxPowerLevel8192S() Channel = %d\n",
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rtlphy->current_channel);
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rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
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}
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rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
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}
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static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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/* AP & ADHOC & MESH will return tmp */
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if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
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return;
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/* Indicate Rx signal strength to FW. */
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if (rtlpriv->dm.useramask) {
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u32 temp = rtlpriv->dm.undec_sm_pwdb;
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temp <<= 16;
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temp |= 0x100;
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/* fw v12 cmdid 5:use max macid ,for nic ,
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* default macid is 0 ,max macid is 1 */
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rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
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} else {
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rtl_write_byte(rtlpriv, 0x4fe,
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(u8) rtlpriv->dm.undec_sm_pwdb);
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}
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}
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void rtl92de_dm_init(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
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rtl_dm_diginit(hw, 0x20);
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rtlpriv->dm_digtable.rx_gain_max = DM_DIG_FA_UPPER;
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rtlpriv->dm_digtable.rx_gain_min = DM_DIG_FA_LOWER;
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rtl92d_dm_init_dynamic_txpower(hw);
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rtl92d_dm_init_edca_turbo(hw);
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rtl92d_dm_init_rate_adaptive_mask(hw);
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rtl92d_dm_initialize_txpower_tracking(hw);
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}
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void rtl92de_dm_watchdog(struct ieee80211_hw *hw)
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{
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struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
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bool fw_current_inpsmode = false;
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bool fwps_awake = true;
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/* 1. RF is OFF. (No need to do DM.)
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* 2. Fw is under power saving mode for FwLPS.
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* (Prevent from SW/FW I/O racing.)
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* 3. IPS workitem is scheduled. (Prevent from IPS sequence
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* to be swapped with DM.
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* 4. RFChangeInProgress is TRUE.
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* (Prevent from broken by IPS/HW/SW Rf off.) */
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if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
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fwps_awake) && (!ppsc->rfchange_inprogress)) {
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rtl92d_dm_pwdb_monitor(hw);
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rtl92d_dm_false_alarm_counter_statistics(hw);
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rtl92d_dm_find_minimum_rssi(hw);
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rtl92d_dm_dig(hw);
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/* rtl92d_dm_dynamic_bb_powersaving(hw); */
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rtl92d_dm_dynamic_txpower(hw);
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/* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
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/* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
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/* rtl92d_dm_interrupt_migration(hw); */
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rtl92d_dm_check_edca_turbo(hw);
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}
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}
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