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c0dd3f4f70
Currently only PCI devices are supported in Ath12k driver. Refactor Ath12k module_init and module_exit to include Ath12k AHB support. Add Ath12k AHB support in Kconfig with dependency on Remoteproc driver. Ath12k AHB support relies on remoteproc driver for firmware download, power up/down etc. Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1 Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1 Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com> Co-developed-by: P Praneesh <quic_ppranees@quicinc.com> Signed-off-by: P Praneesh <quic_ppranees@quicinc.com> Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com> Link: https://patch.msgid.link/20250321-ath12k-ahb-v12-13-bb389ed76ae5@quicinc.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
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/*
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* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022-2025, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef ATH12K_AHB_H
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#define ATH12K_AHB_H
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#include <linux/clk.h>
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#include <linux/remoteproc/qcom_rproc.h>
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#include "core.h"
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#define ATH12K_AHB_RECOVERY_TIMEOUT (3 * HZ)
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#define ATH12K_AHB_SMP2P_SMEM_MSG GENMASK(15, 0)
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#define ATH12K_AHB_SMP2P_SMEM_SEQ_NO GENMASK(31, 16)
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#define ATH12K_AHB_SMP2P_SMEM_VALUE_MASK 0xFFFFFFFF
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#define ATH12K_PCI_CE_WAKE_IRQ 2
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#define ATH12K_PCI_IRQ_CE0_OFFSET 3
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#define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ)
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#define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP
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#define ATH12K_AHB_FW_PREFIX "q6_fw"
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#define ATH12K_AHB_FW_SUFFIX ".mdt"
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#define ATH12K_AHB_FW2 "iu_fw.mdt"
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#define ATH12K_AHB_UPD_SWID 0x12
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#define ATH12K_USERPD_SPAWN_TIMEOUT (5 * HZ)
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#define ATH12K_USERPD_READY_TIMEOUT (10 * HZ)
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#define ATH12K_USERPD_STOP_TIMEOUT (5 * HZ)
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#define ATH12K_USERPD_ID_MASK GENMASK(9, 8)
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#define ATH12K_USERPD_FW_NAME_LEN 35
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enum ath12k_ahb_smp2p_msg_id {
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ATH12K_AHB_POWER_SAVE_ENTER = 1,
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ATH12K_AHB_POWER_SAVE_EXIT,
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};
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enum ath12k_ahb_userpd_irq {
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ATH12K_USERPD_SPAWN_IRQ,
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ATH12K_USERPD_READY_IRQ,
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ATH12K_USERPD_STOP_ACK_IRQ,
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ATH12K_USERPD_MAX_IRQ,
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};
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struct ath12k_base;
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struct ath12k_ahb {
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struct ath12k_base *ab;
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struct rproc *tgt_rproc;
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struct clk *xo_clk;
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struct completion rootpd_ready;
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struct notifier_block root_pd_nb;
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void *root_pd_notifier;
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struct qcom_smem_state *spawn_state;
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struct qcom_smem_state *stop_state;
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struct completion userpd_spawned;
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struct completion userpd_ready;
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struct completion userpd_stopped;
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u32 userpd_id;
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u32 spawn_bit;
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u32 stop_bit;
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int userpd_irq_num[ATH12K_USERPD_MAX_IRQ];
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};
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static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)
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{
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return (struct ath12k_ahb *)ab->drv_priv;
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}
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#ifdef CONFIG_ATH12K_AHB
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int ath12k_ahb_init(void);
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void ath12k_ahb_exit(void);
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#else
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static inline int ath12k_ahb_init(void)
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{
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return 0;
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}
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static inline void ath12k_ahb_exit(void) {};
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#endif
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#endif
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