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The IPQ5018 SoC contains a single internal Gigabit Ethernet PHY which provides an MDI interface directly to an RJ45 connector or an external switch over a PHY to PHY link. The PHY supports 10BASE-T/100BASE-TX/1000BASE-T link modes in SGMII interface mode, CDT, auto-negotiation and 802.3az EEE. Let's add support for this PHY in the at803x driver as it falls within the Qualcomm Atheros OUI. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://patch.msgid.link/20250613-ipq5018-ge-phy-v5-2-9af06e34ea6b@outlook.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
31 lines
749 B
Text
31 lines
749 B
Text
# SPDX-License-Identifier: GPL-2.0-only
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config QCOM_NET_PHYLIB
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tristate
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config AT803X_PHY
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tristate "Qualcomm Atheros AR803X PHYs"
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select QCOM_NET_PHYLIB
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depends on REGULATOR
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help
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Currently supports the AR8030, AR8031, AR8033, AR8035, IPQ5018 model
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config QCA83XX_PHY
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tristate "Qualcomm Atheros QCA833x PHYs"
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select QCOM_NET_PHYLIB
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help
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Currently supports the internal QCA8337(Internal qca8k PHY) model
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config QCA808X_PHY
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tristate "Qualcomm QCA808x PHYs"
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select QCOM_NET_PHYLIB
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help
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Currently supports the QCA8081 model
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config QCA807X_PHY
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tristate "Qualcomm QCA807x PHYs"
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select QCOM_NET_PHYLIB
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select PHY_PACKAGE
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depends on OF_MDIO
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help
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Currently supports the Qualcomm QCA8072, QCA8075 and the PSGMII
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control PHY.
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