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919d763d60
In MII mode, Tx lines are swapped for port0 and port1, which means
Tx port0 receives data from PRU1 and the Tx port1 receives data from
PRU0. This is an expected hardware behavior and reading the Tx stats
needs to be handled accordingly in the driver. Update the driver to
read Tx stats from the PRU1 for port0 and PRU0 for port1.
Fixes: c1e10d5dc7 ("net: ti: icssg-prueth: Add ICSSG Stats")
Signed-off-by: Meghana Malladi <m-malladi@ti.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20250603052904.431203-1-m-malladi@ti.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
95 lines
2.6 KiB
C
95 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Texas Instruments ICSSG Ethernet driver
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*
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* Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/
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*
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*/
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#include "icssg_prueth.h"
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#include "icssg_stats.h"
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#include <linux/regmap.h>
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#define ICSSG_TX_PACKET_OFFSET 0xA0
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#define ICSSG_TX_BYTE_OFFSET 0xEC
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static u32 stats_base[] = { 0x54c, /* Slice 0 stats start */
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0xb18, /* Slice 1 stats start */
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};
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void emac_update_hardware_stats(struct prueth_emac *emac)
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{
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struct prueth *prueth = emac->prueth;
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int slice = prueth_emac_slice(emac);
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u32 base = stats_base[slice];
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u32 tx_pkt_cnt = 0;
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u32 val, reg;
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int i;
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spin_lock(&prueth->stats_lock);
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for (i = 0; i < ARRAY_SIZE(icssg_all_miig_stats); i++) {
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/* In MII mode TX lines are swapped inside ICSSG, so read Tx stats
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* from slice1 for port0 and slice0 for port1 to get accurate Tx
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* stats for a given port
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*/
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if (emac->phy_if == PHY_INTERFACE_MODE_MII &&
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icssg_all_miig_stats[i].offset >= ICSSG_TX_PACKET_OFFSET &&
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icssg_all_miig_stats[i].offset <= ICSSG_TX_BYTE_OFFSET)
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base = stats_base[slice ^ 1];
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regmap_read(prueth->miig_rt,
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base + icssg_all_miig_stats[i].offset,
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&val);
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regmap_write(prueth->miig_rt,
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base + icssg_all_miig_stats[i].offset,
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val);
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if (icssg_all_miig_stats[i].offset == ICSSG_TX_PACKET_OFFSET)
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tx_pkt_cnt = val;
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emac->stats[i] += val;
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if (icssg_all_miig_stats[i].offset == ICSSG_TX_BYTE_OFFSET)
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emac->stats[i] -= tx_pkt_cnt * 8;
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}
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if (prueth->pa_stats) {
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for (i = 0; i < ARRAY_SIZE(icssg_all_pa_stats); i++) {
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reg = icssg_all_pa_stats[i].offset +
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slice * sizeof(u32);
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regmap_read(prueth->pa_stats, reg, &val);
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emac->pa_stats[i] += val;
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}
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}
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spin_unlock(&prueth->stats_lock);
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}
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void icssg_stats_work_handler(struct work_struct *work)
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{
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struct prueth_emac *emac = container_of(work, struct prueth_emac,
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stats_work.work);
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emac_update_hardware_stats(emac);
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queue_delayed_work(system_long_wq, &emac->stats_work,
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msecs_to_jiffies((STATS_TIME_LIMIT_1G_MS * 1000) / emac->speed));
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}
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EXPORT_SYMBOL_GPL(icssg_stats_work_handler);
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int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(icssg_all_miig_stats); i++) {
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if (!strcmp(icssg_all_miig_stats[i].name, stat_name))
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return emac->stats[icssg_all_miig_stats[i].offset / sizeof(u32)];
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}
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if (emac->prueth->pa_stats) {
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for (i = 0; i < ARRAY_SIZE(icssg_all_pa_stats); i++) {
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if (!strcmp(icssg_all_pa_stats[i].name, stat_name))
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return emac->pa_stats[i];
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}
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}
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netdev_err(emac->ndev, "Invalid stats %s\n", stat_name);
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return -EINVAL;
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}
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