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74c1b2338e
The cn10k hardware ptp timestamp format has been modified primarily to support 1-step ptp clock. The 64-bit timestamp used by hardware is split into two 32-bit fields, the upper one holds seconds, the lower one nanoseconds. A new register (PTP_CLOCK_SEC) has been added that returns the current seconds value. The nanoseconds register PTP_CLOCK_HI resets after every second. The cn10k RPM block provides Rx/Tx timestamps to the NIX block using the new timestamp format. The software can read the current timestamp in nanoseconds by reading both PTP_CLOCK_SEC & PTP_CLOCK_HI registers. This patch provides support for new timestamp format. Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: Rakesh Babu Saladi <rsaladi2@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
32 lines
707 B
C
32 lines
707 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Marvell RVU Ethernet driver
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*
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* Copyright (C) 2020 Marvell.
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*
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*/
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#ifndef OTX2_PTP_H
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#define OTX2_PTP_H
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static inline u64 otx2_ptp_convert_rx_timestamp(u64 timestamp)
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{
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return be64_to_cpu(*(__be64 *)×tamp);
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}
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static inline u64 otx2_ptp_convert_tx_timestamp(u64 timestamp)
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{
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return timestamp;
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}
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static inline u64 cn10k_ptp_convert_timestamp(u64 timestamp)
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{
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return ((timestamp >> 32) * NSEC_PER_SEC) + (timestamp & 0xFFFFFFFFUL);
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}
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int otx2_ptp_init(struct otx2_nic *pfvf);
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void otx2_ptp_destroy(struct otx2_nic *pfvf);
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int otx2_ptp_clock_index(struct otx2_nic *pfvf);
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int otx2_ptp_tstamp2time(struct otx2_nic *pfvf, u64 tstamp, u64 *tsns);
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#endif
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