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70f8986ece
This patch implements the CN20k MBOX communication between PF and it's VFs. CN20K silicon got extra interrupt of MBOX response for trigger interrupt. Also few of the CSR offsets got changed in CN20K against prior series of silicons. Signed-off-by: Sai Krishna <saikrishnag@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Link: https://patch.msgid.link/1749639716-13868-7-git-send-email-sbhatta@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
17 lines
435 B
C
17 lines
435 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Marvell RVU Ethernet driver
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*
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* Copyright (C) 2024 Marvell.
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*
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*/
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#ifndef CN20K_H
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#define CN20K_H
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#include "otx2_common.h"
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void cn20k_init(struct otx2_nic *pfvf);
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int cn20k_register_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs);
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void cn20k_disable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs);
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void cn20k_enable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs);
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#endif /* CN20K_H */
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