linux/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h
Fan Gong 17fcb3dc12 hinic3: module initialization and tx/rx logic
This is [1/3] part of hinic3 Ethernet driver initial submission.
With this patch hinic3 is a valid kernel module but non-functional
driver.

The driver parts contained in this patch:
Module initialization.
PCI driver registration but with empty id_table.
Auxiliary driver registration.
Net device_ops registration but open/stop are empty stubs.
tx/rx logic.

All major data structures of the driver are fully introduced with the
code that uses them but without their initialization code that requires
management interface with the hw.

Co-developed-by: Xin Guo <guoxin09@huawei.com>
Signed-off-by: Xin Guo <guoxin09@huawei.com>
Signed-off-by: Fan Gong <gongfan1@huawei.com>
Co-developed-by: Gur Stavi <gur.stavi@huawei.com>
Signed-off-by: Gur Stavi <gur.stavi@huawei.com>
Link: https://patch.msgid.link/76a137ffdfe115c737c2c224f0c93b60ba53cc16.1747736586.git.gur.stavi@huawei.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 20:31:42 -07:00

82 lines
2 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */
#ifndef _HINIC3_NIC_DEV_H_
#define _HINIC3_NIC_DEV_H_
#include <linux/netdevice.h>
#include "hinic3_hw_cfg.h"
#include "hinic3_mgmt_interface.h"
enum hinic3_flags {
HINIC3_RSS_ENABLE,
};
enum hinic3_rss_hash_type {
HINIC3_RSS_HASH_ENGINE_TYPE_XOR = 0,
HINIC3_RSS_HASH_ENGINE_TYPE_TOEP = 1,
};
struct hinic3_rss_type {
u8 tcp_ipv6_ext;
u8 ipv6_ext;
u8 tcp_ipv6;
u8 ipv6;
u8 tcp_ipv4;
u8 ipv4;
u8 udp_ipv6;
u8 udp_ipv4;
};
struct hinic3_irq_cfg {
struct net_device *netdev;
u16 msix_entry_idx;
/* provided by OS */
u32 irq_id;
char irq_name[IFNAMSIZ + 16];
struct napi_struct napi;
cpumask_t affinity_mask;
struct hinic3_txq *txq;
struct hinic3_rxq *rxq;
};
struct hinic3_dyna_txrxq_params {
u16 num_qps;
u32 sq_depth;
u32 rq_depth;
struct hinic3_dyna_txq_res *txqs_res;
struct hinic3_dyna_rxq_res *rxqs_res;
struct hinic3_irq_cfg *irq_cfg;
};
struct hinic3_nic_dev {
struct pci_dev *pdev;
struct net_device *netdev;
struct hinic3_hwdev *hwdev;
struct hinic3_nic_io *nic_io;
u16 max_qps;
u16 rx_buf_len;
u32 lro_replenish_thld;
unsigned long flags;
struct hinic3_nic_service_cap nic_svc_cap;
struct hinic3_dyna_txrxq_params q_params;
struct hinic3_txq *txqs;
struct hinic3_rxq *rxqs;
u16 num_qp_irq;
struct msix_entry *qps_msix_entries;
bool link_status_up;
};
void hinic3_set_netdev_ops(struct net_device *netdev);
/* Temporary prototypes. Functions become static in later submission. */
void qp_add_napi(struct hinic3_irq_cfg *irq_cfg);
void qp_del_napi(struct hinic3_irq_cfg *irq_cfg);
#endif