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8f7ae5a851
Reconfiguration of netdev may trigger close/open procedure which can
break FIFO status by adjusting the amount of empty slots for TX
timestamps. But it is not really needed because timestamps for the
packets sent over the wire still can be retrieved. On the other side,
during netdev close procedure any skbs waiting for TX timestamps can be
leaked because there is no cleaning procedure called. Free skbs waiting
for TX timestamps when closing netdev.
Fixes: 8aa2a79e9b ("bnxt_en: Increase the max total outstanding PTP TX packets to 4")
Reviewed-by: Michael Chan <michael.chan@broadcom.com>
Reviewed-by: Pavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: Vadim Fedorenko <vadfed@meta.com>
Link: https://patch.msgid.link/20250424125547.460632-1-vadfed@meta.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
198 lines
5.8 KiB
C
198 lines
5.8 KiB
C
/* Broadcom NetXtreme-C/E network driver.
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*
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* Copyright (c) 2021 Broadcom Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*/
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#ifndef BNXT_PTP_H
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#define BNXT_PTP_H
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#include <linux/ptp_clock_kernel.h>
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#include <linux/timecounter.h>
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#define BNXT_PTP_GRC_WIN 6
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#define BNXT_PTP_GRC_WIN_BASE 0x6000
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#define BNXT_MAX_PHC_DRIFT 31000000
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#define BNXT_CYCLES_SHIFT 23
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#define BNXT_DEVCLK_FREQ 1000000
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#define BNXT_LO_TIMER_MASK 0x0000ffffffffUL
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#define BNXT_HI_TIMER_MASK 0xffff00000000UL
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#define BNXT_HI_TIMER_SHIFT 24
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#define BNXT_PTP_DFLT_TX_TMO 1000 /* ms */
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#define BNXT_PTP_QTS_TIMEOUT 1000
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#define BNXT_PTP_QTS_MAX_TMO_US 65535U
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#define BNXT_PTP_QTS_TX_ENABLES (PORT_TS_QUERY_REQ_ENABLES_PTP_SEQ_ID | \
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PORT_TS_QUERY_REQ_ENABLES_TS_REQ_TIMEOUT | \
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PORT_TS_QUERY_REQ_ENABLES_PTP_HDR_OFFSET)
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struct pps_pin {
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u8 event;
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u8 usage;
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u8 state;
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};
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#define TSIO_PIN_VALID(pin) ((pin) >= 0 && (pin) < (BNXT_MAX_TSIO_PINS))
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#define EVENT_DATA2_PPS_EVENT_TYPE(data2) \
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((data2) & ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE)
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#define EVENT_DATA2_PPS_PIN_NUM(data2) \
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(((data2) & \
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ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_MASK) >>\
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ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_SFT)
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#define BNXT_DATA2_UPPER_MSK \
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ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_MASK
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#define BNXT_DATA2_UPPER_SFT \
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(32 - \
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ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_SFT)
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#define BNXT_DATA1_LOWER_MSK \
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ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_MASK
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#define BNXT_DATA1_LOWER_SFT \
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ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_SFT
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#define EVENT_PPS_TS(data2, data1) \
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(((u64)((data2) & BNXT_DATA2_UPPER_MSK) << BNXT_DATA2_UPPER_SFT) |\
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(((data1) & BNXT_DATA1_LOWER_MSK) >> BNXT_DATA1_LOWER_SFT))
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#define BNXT_PPS_PIN_DISABLE 0
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#define BNXT_PPS_PIN_ENABLE 1
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#define BNXT_PPS_PIN_NONE 0
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#define BNXT_PPS_PIN_PPS_IN 1
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#define BNXT_PPS_PIN_PPS_OUT 2
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#define BNXT_PPS_PIN_SYNC_IN 3
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#define BNXT_PPS_PIN_SYNC_OUT 4
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#define BNXT_PPS_EVENT_INTERNAL 1
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#define BNXT_PPS_EVENT_EXTERNAL 2
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struct bnxt_pps {
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u8 num_pins;
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#define BNXT_MAX_TSIO_PINS 4
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struct pps_pin pins[BNXT_MAX_TSIO_PINS];
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};
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struct bnxt_ptp_stats {
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u64 ts_pkts;
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u64 ts_lost;
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atomic64_t ts_err;
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};
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#define BNXT_MAX_TX_TS 4
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#define NEXT_TXTS(idx) (((idx) + 1) & (BNXT_MAX_TX_TS - 1))
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struct bnxt_ptp_tx_req {
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struct sk_buff *tx_skb;
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u16 tx_seqid;
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u16 tx_hdr_off;
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unsigned long abs_txts_tmo;
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};
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struct bnxt_ptp_cfg {
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struct ptp_clock_info ptp_info;
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struct ptp_clock *ptp_clock;
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struct cyclecounter cc;
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struct timecounter tc;
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struct bnxt_pps pps_info;
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/* serialize timecounter access */
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seqlock_t ptp_lock;
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/* serialize ts tx request queuing */
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spinlock_t ptp_tx_lock;
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u64 current_time;
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unsigned long next_period;
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unsigned long next_overflow_check;
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u32 cmult;
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/* cache of upper 24 bits of cyclecoutner. 8 bits are used to check for roll-over */
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u32 old_time;
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/* a 23b shift cyclecounter will overflow in ~36 mins. Check overflow every 18 mins. */
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#define BNXT_PHC_OVERFLOW_PERIOD (18 * 60 * HZ)
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struct bnxt_ptp_tx_req txts_req[BNXT_MAX_TX_TS];
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struct bnxt *bp;
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u32 tx_avail;
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u16 rxctl;
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#define BNXT_PTP_MSG_SYNC (1 << 0)
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#define BNXT_PTP_MSG_DELAY_REQ (1 << 1)
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#define BNXT_PTP_MSG_PDELAY_REQ (1 << 2)
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#define BNXT_PTP_MSG_PDELAY_RESP (1 << 3)
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#define BNXT_PTP_MSG_FOLLOW_UP (1 << 8)
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#define BNXT_PTP_MSG_DELAY_RESP (1 << 9)
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#define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP (1 << 10)
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#define BNXT_PTP_MSG_ANNOUNCE (1 << 11)
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#define BNXT_PTP_MSG_SIGNALING (1 << 12)
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#define BNXT_PTP_MSG_MANAGEMENT (1 << 13)
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#define BNXT_PTP_MSG_EVENTS (BNXT_PTP_MSG_SYNC | \
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BNXT_PTP_MSG_DELAY_REQ | \
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BNXT_PTP_MSG_PDELAY_REQ | \
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BNXT_PTP_MSG_PDELAY_RESP)
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u8 tx_tstamp_en:1;
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u8 rtc_configured:1;
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int rx_filter;
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u32 tstamp_filters;
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u32 refclk_regs[2];
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u32 refclk_mapped_regs[2];
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u32 txts_tmo;
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u16 txts_prod;
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u16 txts_cons;
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struct bnxt_ptp_stats stats;
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};
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#define BNXT_PTP_INC_TX_AVAIL(ptp) \
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do { \
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spin_lock_bh(&(ptp)->ptp_tx_lock); \
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(ptp)->tx_avail++; \
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spin_unlock_bh(&(ptp)->ptp_tx_lock); \
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} while (0)
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int bnxt_ptp_parse(struct sk_buff *skb, u16 *seq_id, u16 *hdr_off);
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void bnxt_ptp_update_current_time(struct bnxt *bp);
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void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2);
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int bnxt_ptp_cfg_tstamp_filters(struct bnxt *bp);
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void bnxt_ptp_reapply_pps(struct bnxt *bp);
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int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr);
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int bnxt_hwtstamp_get(struct net_device *dev, struct ifreq *ifr);
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void bnxt_ptp_free_txts_skbs(struct bnxt_ptp_cfg *ptp);
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int bnxt_ptp_get_txts_prod(struct bnxt_ptp_cfg *ptp, u16 *prod);
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void bnxt_get_tx_ts_p5(struct bnxt *bp, struct sk_buff *skb, u16 prod);
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int bnxt_get_rx_ts_p5(struct bnxt *bp, u64 *ts, u32 pkt_ts);
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void bnxt_tx_ts_cmp(struct bnxt *bp, struct bnxt_napi *bnapi,
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struct tx_ts_cmp *tscmp);
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void bnxt_ptp_rtc_timecounter_init(struct bnxt_ptp_cfg *ptp, u64 ns);
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int bnxt_ptp_init_rtc(struct bnxt *bp, bool phc_cfg);
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int bnxt_ptp_init(struct bnxt *bp);
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void bnxt_ptp_clear(struct bnxt *bp);
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static inline u64 bnxt_timecounter_cyc2time(struct bnxt_ptp_cfg *ptp, u64 ts)
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{
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unsigned int seq;
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u64 ns;
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do {
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seq = read_seqbegin(&ptp->ptp_lock);
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ns = timecounter_cyc2time(&ptp->tc, ts);
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} while (read_seqretry(&ptp->ptp_lock, seq));
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return ns;
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}
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static inline u64 bnxt_extend_cycles_32b_to_48b(struct bnxt_ptp_cfg *ptp, u32 ts)
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{
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u64 time, cycles;
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time = (u64)READ_ONCE(ptp->old_time) << BNXT_HI_TIMER_SHIFT;
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cycles = (time & BNXT_HI_TIMER_MASK) | ts;
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if (ts < (time & BNXT_LO_TIMER_MASK))
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cycles += BNXT_LO_TIMER_MASK + 1;
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return cycles;
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}
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#endif
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