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Pass PD_FLAG_REQUIRED_OPP flag to allow opp framework to scale the rpmpd power domains. Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Reviewed-by: Dikshita Agarwal <quic_dikshita@quicinc.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
372 lines
8.2 KiB
C
372 lines
8.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/interconnect.h>
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#include <linux/module.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_opp.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include "iris_core.h"
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#include "iris_ctrls.h"
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#include "iris_vidc.h"
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static int iris_init_icc(struct iris_core *core)
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{
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const struct icc_info *icc_tbl;
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u32 i = 0;
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icc_tbl = core->iris_platform_data->icc_tbl;
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core->icc_count = core->iris_platform_data->icc_tbl_size;
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core->icc_tbl = devm_kzalloc(core->dev,
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sizeof(struct icc_bulk_data) * core->icc_count,
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GFP_KERNEL);
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if (!core->icc_tbl)
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return -ENOMEM;
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for (i = 0; i < core->icc_count; i++) {
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core->icc_tbl[i].name = icc_tbl[i].name;
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core->icc_tbl[i].avg_bw = icc_tbl[i].bw_min_kbps;
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core->icc_tbl[i].peak_bw = 0;
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}
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return devm_of_icc_bulk_get(core->dev, core->icc_count, core->icc_tbl);
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}
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static int iris_init_power_domains(struct iris_core *core)
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{
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const struct platform_clk_data *clk_tbl;
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u32 clk_cnt, i;
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int ret;
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struct dev_pm_domain_attach_data iris_pd_data = {
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.pd_names = core->iris_platform_data->pmdomain_tbl,
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.num_pd_names = core->iris_platform_data->pmdomain_tbl_size,
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.pd_flags = PD_FLAG_NO_DEV_LINK,
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};
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struct dev_pm_domain_attach_data iris_opp_pd_data = {
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.pd_names = core->iris_platform_data->opp_pd_tbl,
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.num_pd_names = core->iris_platform_data->opp_pd_tbl_size,
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.pd_flags = PD_FLAG_DEV_LINK_ON | PD_FLAG_REQUIRED_OPP,
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};
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ret = devm_pm_domain_attach_list(core->dev, &iris_pd_data, &core->pmdomain_tbl);
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if (ret < 0)
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return ret;
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ret = devm_pm_domain_attach_list(core->dev, &iris_opp_pd_data, &core->opp_pmdomain_tbl);
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if (ret < 0)
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return ret;
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clk_tbl = core->iris_platform_data->clk_tbl;
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clk_cnt = core->iris_platform_data->clk_tbl_size;
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for (i = 0; i < clk_cnt; i++) {
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if (clk_tbl[i].clk_type == IRIS_HW_CLK) {
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ret = devm_pm_opp_set_clkname(core->dev, clk_tbl[i].clk_name);
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if (ret)
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return ret;
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}
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}
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return devm_pm_opp_of_add_table(core->dev);
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}
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static int iris_init_clocks(struct iris_core *core)
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{
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int ret;
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ret = devm_clk_bulk_get_all(core->dev, &core->clock_tbl);
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if (ret < 0)
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return ret;
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core->clk_count = ret;
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return 0;
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}
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static int iris_init_reset_table(struct iris_core *core,
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struct reset_control_bulk_data **resets,
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const char * const *rst_tbl, u32 rst_tbl_size)
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{
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u32 i = 0;
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*resets = devm_kzalloc(core->dev,
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sizeof(struct reset_control_bulk_data) * rst_tbl_size,
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GFP_KERNEL);
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if (!*resets)
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return -ENOMEM;
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for (i = 0; i < rst_tbl_size; i++)
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(*resets)[i].id = rst_tbl[i];
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return devm_reset_control_bulk_get_exclusive(core->dev, rst_tbl_size, *resets);
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}
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static int iris_init_resets(struct iris_core *core)
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{
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int ret;
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ret = iris_init_reset_table(core, &core->resets,
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core->iris_platform_data->clk_rst_tbl,
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core->iris_platform_data->clk_rst_tbl_size);
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if (ret)
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return ret;
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if (!core->iris_platform_data->controller_rst_tbl_size)
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return 0;
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return iris_init_reset_table(core, &core->controller_resets,
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core->iris_platform_data->controller_rst_tbl,
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core->iris_platform_data->controller_rst_tbl_size);
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}
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static int iris_init_resources(struct iris_core *core)
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{
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int ret;
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ret = iris_init_icc(core);
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if (ret)
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return ret;
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ret = iris_init_power_domains(core);
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if (ret)
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return ret;
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ret = iris_init_clocks(core);
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if (ret)
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return ret;
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return iris_init_resets(core);
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}
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static int iris_register_video_device(struct iris_core *core)
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{
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struct video_device *vdev;
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int ret;
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vdev = video_device_alloc();
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if (!vdev)
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return -ENOMEM;
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strscpy(vdev->name, "qcom-iris-decoder", sizeof(vdev->name));
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vdev->release = video_device_release;
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vdev->fops = core->iris_v4l2_file_ops;
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vdev->ioctl_ops = core->iris_v4l2_ioctl_ops;
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vdev->vfl_dir = VFL_DIR_M2M;
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vdev->v4l2_dev = &core->v4l2_dev;
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vdev->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING;
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ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
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if (ret)
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goto err_vdev_release;
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core->vdev_dec = vdev;
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video_set_drvdata(vdev, core);
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return 0;
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err_vdev_release:
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video_device_release(vdev);
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return ret;
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}
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static void iris_remove(struct platform_device *pdev)
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{
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struct iris_core *core;
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core = platform_get_drvdata(pdev);
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if (!core)
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return;
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iris_core_deinit(core);
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video_unregister_device(core->vdev_dec);
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v4l2_device_unregister(&core->v4l2_dev);
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mutex_destroy(&core->lock);
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}
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static void iris_sys_error_handler(struct work_struct *work)
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{
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struct iris_core *core =
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container_of(work, struct iris_core, sys_error_handler.work);
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iris_core_deinit(core);
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iris_core_init(core);
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}
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static int iris_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct iris_core *core;
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u64 dma_mask;
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int ret;
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core = devm_kzalloc(&pdev->dev, sizeof(*core), GFP_KERNEL);
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if (!core)
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return -ENOMEM;
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core->dev = dev;
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core->state = IRIS_CORE_DEINIT;
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mutex_init(&core->lock);
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init_completion(&core->core_init_done);
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core->response_packet = devm_kzalloc(core->dev, IFACEQ_CORE_PKT_SIZE, GFP_KERNEL);
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if (!core->response_packet)
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return -ENOMEM;
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INIT_LIST_HEAD(&core->instances);
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INIT_DELAYED_WORK(&core->sys_error_handler, iris_sys_error_handler);
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core->reg_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(core->reg_base))
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return PTR_ERR(core->reg_base);
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core->irq = platform_get_irq(pdev, 0);
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if (core->irq < 0)
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return core->irq;
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core->iris_platform_data = of_device_get_match_data(core->dev);
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ret = devm_request_threaded_irq(core->dev, core->irq, iris_hfi_isr,
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iris_hfi_isr_handler, IRQF_TRIGGER_HIGH, "iris", core);
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if (ret)
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return ret;
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disable_irq_nosync(core->irq);
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iris_init_ops(core);
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core->iris_platform_data->init_hfi_command_ops(core);
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core->iris_platform_data->init_hfi_response_ops(core);
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ret = iris_init_resources(core);
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if (ret)
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return ret;
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iris_session_init_caps(core);
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ret = v4l2_device_register(dev, &core->v4l2_dev);
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if (ret)
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return ret;
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ret = iris_register_video_device(core);
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if (ret)
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goto err_v4l2_unreg;
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platform_set_drvdata(pdev, core);
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dma_mask = core->iris_platform_data->dma_mask;
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ret = dma_set_mask_and_coherent(dev, dma_mask);
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if (ret)
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goto err_vdev_unreg;
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dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
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dma_set_seg_boundary(&pdev->dev, DMA_BIT_MASK(32));
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pm_runtime_set_autosuspend_delay(core->dev, AUTOSUSPEND_DELAY_VALUE);
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pm_runtime_use_autosuspend(core->dev);
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ret = devm_pm_runtime_enable(core->dev);
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if (ret)
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goto err_vdev_unreg;
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return 0;
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err_vdev_unreg:
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video_unregister_device(core->vdev_dec);
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err_v4l2_unreg:
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v4l2_device_unregister(&core->v4l2_dev);
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return ret;
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}
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static int __maybe_unused iris_pm_suspend(struct device *dev)
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{
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struct iris_core *core;
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int ret = 0;
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core = dev_get_drvdata(dev);
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mutex_lock(&core->lock);
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if (core->state != IRIS_CORE_INIT)
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goto exit;
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ret = iris_hfi_pm_suspend(core);
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exit:
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mutex_unlock(&core->lock);
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return ret;
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}
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static int __maybe_unused iris_pm_resume(struct device *dev)
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{
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struct iris_core *core;
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int ret = 0;
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core = dev_get_drvdata(dev);
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mutex_lock(&core->lock);
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if (core->state != IRIS_CORE_INIT)
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goto exit;
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ret = iris_hfi_pm_resume(core);
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pm_runtime_mark_last_busy(core->dev);
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exit:
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mutex_unlock(&core->lock);
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return ret;
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}
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static const struct dev_pm_ops iris_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
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pm_runtime_force_resume)
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SET_RUNTIME_PM_OPS(iris_pm_suspend, iris_pm_resume, NULL)
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};
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static const struct of_device_id iris_dt_match[] = {
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{
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.compatible = "qcom,qcs8300-iris",
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.data = &qcs8300_data,
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},
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#if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS))
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{
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.compatible = "qcom,sm8250-venus",
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.data = &sm8250_data,
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},
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#endif
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{
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.compatible = "qcom,sm8550-iris",
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.data = &sm8550_data,
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},
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{
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.compatible = "qcom,sm8650-iris",
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.data = &sm8650_data,
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},
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{ },
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};
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MODULE_DEVICE_TABLE(of, iris_dt_match);
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static struct platform_driver qcom_iris_driver = {
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.probe = iris_probe,
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.remove = iris_remove,
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.driver = {
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.name = "qcom-iris",
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.of_match_table = iris_dt_match,
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.pm = &iris_pm_ops,
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},
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};
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module_platform_driver(qcom_iris_driver);
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MODULE_DESCRIPTION("Qualcomm iris video driver");
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MODULE_LICENSE("GPL");
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