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Implement power scaling including a specific vpu2 and vpu3 calculation for clock and bus bandwidth, which depends on the hardware configuration, codec format, resolution and frame rate. Signed-off-by: Vedang Nagar <quic_vnagar@quicinc.com> Tested-by: Stefan Schmidt <stefan.schmidt@linaro.org> # x1e80100 (Dell XPS 13 9345) Reviewed-by: Stefan Schmidt <stefan.schmidt@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
13 lines
257 B
C
13 lines
257 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef __IRIS_POWER_H__
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#define __IRIS_POWER_H__
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struct iris_inst;
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int iris_scale_power(struct iris_inst *inst);
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#endif
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