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Configure the link bit to associate activity and inactivity sensing, allowing the sensor to reflect its internal power-saving state. Additionally, enable the auto-sleep bit to transition the sensor into auto-sleep mode during periods of inactivity, as outlined in the datasheet. Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Link: https://patch.msgid.link/20250702230819.19353-7-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
114 lines
3.4 KiB
C
114 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* ADXL313 3-Axis Digital Accelerometer
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*
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* Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com>
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*/
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#ifndef _ADXL313_H_
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#define _ADXL313_H_
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#include <linux/iio/iio.h>
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/* ADXL313 register definitions */
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#define ADXL313_REG_DEVID0 0x00
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#define ADXL313_REG_DEVID1 0x01
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#define ADXL313_REG_PARTID 0x02
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#define ADXL313_REG_XID 0x04
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#define ADXL313_REG_SOFT_RESET 0x18
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#define ADXL313_REG_OFS_AXIS(index) (0x1E + (index))
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#define ADXL313_REG_THRESH_ACT 0x24
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#define ADXL313_REG_THRESH_INACT 0x25
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#define ADXL313_REG_TIME_INACT 0x26
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#define ADXL313_REG_ACT_INACT_CTL 0x27
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#define ADXL313_REG_BW_RATE 0x2C
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#define ADXL313_REG_POWER_CTL 0x2D
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#define ADXL313_REG_INT_ENABLE 0x2E
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#define ADXL313_REG_INT_MAP 0x2F
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#define ADXL313_REG_INT_SOURCE 0x30
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#define ADXL313_REG_DATA_FORMAT 0x31
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#define ADXL313_REG_DATA_AXIS(index) (0x32 + ((index) * 2))
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#define ADXL313_REG_FIFO_CTL 0x38
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#define ADXL313_REG_FIFO_STATUS 0x39
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#define ADXL313_DEVID0 0xAD
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#define ADXL313_DEVID0_ADXL312_314 0xE5
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#define ADXL313_DEVID1 0x1D
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#define ADXL313_PARTID 0xCB
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#define ADXL313_SOFT_RESET 0x52
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#define ADXL313_RATE_MSK GENMASK(3, 0)
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#define ADXL313_RATE_BASE 6
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#define ADXL313_POWER_CTL_MSK BIT(3)
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#define ADXL313_POWER_CTL_INACT_MSK GENMASK(5, 4)
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#define ADXL313_POWER_CTL_LINK BIT(5)
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#define ADXL313_POWER_CTL_AUTO_SLEEP BIT(4)
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#define ADXL313_RANGE_MSK GENMASK(1, 0)
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#define ADXL313_RANGE_MAX 3
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#define ADXL313_FULL_RES BIT(3)
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#define ADXL313_SPI_3WIRE BIT(6)
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#define ADXL313_I2C_DISABLE BIT(6)
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#define ADXL313_INT_OVERRUN BIT(0)
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#define ADXL313_INT_WATERMARK BIT(1)
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#define ADXL313_INT_INACTIVITY BIT(3)
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#define ADXL313_INT_ACTIVITY BIT(4)
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#define ADXL313_INT_DREADY BIT(7)
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/* FIFO entries: how many values are stored in the FIFO */
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#define ADXL313_REG_FIFO_STATUS_ENTRIES_MSK GENMASK(5, 0)
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/* FIFO samples: number of samples needed for watermark (FIFO mode) */
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#define ADXL313_REG_FIFO_CTL_SAMPLES_MSK GENMASK(4, 0)
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#define ADXL313_REG_FIFO_CTL_MODE_MSK GENMASK(7, 6)
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#define ADXL313_FIFO_BYPASS 0
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#define ADXL313_FIFO_STREAM 2
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#define ADXL313_FIFO_SIZE 32
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#define ADXL313_NUM_AXIS 3
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extern const struct regmap_access_table adxl312_readable_regs_table;
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extern const struct regmap_access_table adxl313_readable_regs_table;
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extern const struct regmap_access_table adxl314_readable_regs_table;
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extern const struct regmap_access_table adxl312_writable_regs_table;
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extern const struct regmap_access_table adxl313_writable_regs_table;
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extern const struct regmap_access_table adxl314_writable_regs_table;
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bool adxl313_is_volatile_reg(struct device *dev, unsigned int reg);
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enum adxl313_device_type {
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ADXL312,
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ADXL313,
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ADXL314,
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};
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struct adxl313_data {
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struct regmap *regmap;
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const struct adxl313_chip_info *chip_info;
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struct mutex lock; /* lock to protect transf_buf */
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u8 watermark;
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__le16 transf_buf __aligned(IIO_DMA_MINALIGN);
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__le16 fifo_buf[ADXL313_NUM_AXIS * ADXL313_FIFO_SIZE + 1];
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};
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struct adxl313_chip_info {
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const char *name;
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enum adxl313_device_type type;
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int scale_factor;
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bool variable_range;
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bool soft_reset;
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int (*check_id)(struct device *dev, struct adxl313_data *data);
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};
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extern const struct adxl313_chip_info adxl31x_chip_info[];
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int adxl313_core_probe(struct device *dev,
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struct regmap *regmap,
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const struct adxl313_chip_info *chip_info,
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int (*setup)(struct device *, struct regmap *));
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#endif /* _ADXL313_H_ */
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