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44f93b209e
This commit enables basic support for Hopper GPUs, and is intended primarily as a base supporting Blackwell GPUs, which reuse most of the code added here. Advanced features such as Confidential Compute are not supported. Beyond a few miscellaneous register moves and HW class ID plumbing, the bulk of the changes implemented here are to support the GSP-RM boot sequence used on Hopper/Blackwell GPUs, as well as a new page table layout. There should be no changes here that impact prior GPUs. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Co-developed-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Timur Tabi <ttabi@nvidia.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timur Tabi <ttabi@nvidia.com> Tested-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
25 lines
631 B
C
25 lines
631 B
C
/* SPDX-License-Identifier: MIT
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*
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* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
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*/
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#include "mem.h"
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#include "vmm.h"
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#include <nvif/class.h>
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static const struct nvkm_mmu_func
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gh100_mmu = {
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.dma_bits = 52,
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.mmu = {{ -1, -1, NVIF_CLASS_MMU_GF100}},
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.mem = {{ -1, 0, NVIF_CLASS_MEM_GF100}, gf100_mem_new, gf100_mem_map },
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.vmm = {{ -1, 0, NVIF_CLASS_VMM_GP100}, gh100_vmm_new },
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.kind = tu102_mmu_kind,
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.kind_sys = true,
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};
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int
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gh100_mmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
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struct nvkm_mmu **pmmu)
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{
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return r535_mmu_new(&gh100_mmu, device, type, inst, pmmu);
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}
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