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76b8f81a5b
GPUs exist now with a 64-bit BAR0, which mean that BAR1 and BAR2's indices (as passed to pci_resource_len() etc) are bumped up by one. Modify nvkm_device.resource_addr/size() to take an enum instead of an integer bar index, and take IORESOURCE_MEM_64 into account when translating to the "raw" bar id. [airlied: fixup ERR_PTR] Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timur Tabi <ttabi@nvidia.com> Tested-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com> |
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| .. | ||
| base.c | ||
| g84.c | ||
| gf100.c | ||
| gf100.h | ||
| gk20a.c | ||
| gm20b.c | ||
| gm107.c | ||
| Kbuild | ||
| nv50.c | ||
| nv50.h | ||
| priv.h | ||
| tu102.c | ||