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35243fc777
Macbook 5,1 with MCP79 lost its backlight control since the recent
change for supporting GSP-RM; it rewrote the whole nv50 backlight
control code and each display engine is supposed to have an entry for
IOR bl callback, but it didn't cover mcp77.
This patch adds the missing bl entry initialization for mcp77 display
engine to recover the backlight control.
Fixes: 2274ce7e36 ("drm/nouveau/disp: add output backlight control methods")
Cc: stable@vger.kernel.org
Link: https://bugzilla.suse.com/show_bug.cgi?id=1223838
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20250102114944.11499-1-tiwai@suse.de
73 lines
2.6 KiB
C
73 lines
2.6 KiB
C
/*
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* Copyright 2017 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "priv.h"
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#include "chan.h"
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#include "head.h"
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#include "ior.h"
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#include <nvif/class.h>
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static const struct nvkm_ior_func
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mcp77_sor = {
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.state = g94_sor_state,
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.power = nv50_sor_power,
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.clock = nv50_sor_clock,
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.bl = &nv50_sor_bl,
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.hdmi = &g84_sor_hdmi,
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.dp = &g94_sor_dp,
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};
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static int
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mcp77_sor_new(struct nvkm_disp *disp, int id)
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{
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return nvkm_ior_new_(&mcp77_sor, disp, SOR, id, false);
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}
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static const struct nvkm_disp_func
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mcp77_disp = {
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.oneinit = nv50_disp_oneinit,
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.init = nv50_disp_init,
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.fini = nv50_disp_fini,
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.intr = nv50_disp_intr,
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.super = nv50_disp_super,
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.uevent = &nv50_disp_chan_uevent,
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.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
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.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
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.sor = { .cnt = g94_sor_cnt, .new = mcp77_sor_new },
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.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
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.root = { 0,0,GT206_DISP },
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.user = {
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{{0,0, G82_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs },
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{{0,0, G82_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm },
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{{0,0,GT200_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },
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{{0,0,GT206_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core },
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{{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, >200_disp_ovly },
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{}
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},
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};
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int
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mcp77_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
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struct nvkm_disp **pdisp)
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{
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return nvkm_disp_new_(&mcp77_disp, device, type, inst, pdisp);
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}
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