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44f93b209e
This commit enables basic support for Hopper GPUs, and is intended primarily as a base supporting Blackwell GPUs, which reuse most of the code added here. Advanced features such as Confidential Compute are not supported. Beyond a few miscellaneous register moves and HW class ID plumbing, the bulk of the changes implemented here are to support the GSP-RM boot sequence used on Hopper/Blackwell GPUs, as well as a new page table layout. There should be no changes here that impact prior GPUs. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Co-developed-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Timur Tabi <ttabi@nvidia.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timur Tabi <ttabi@nvidia.com> Tested-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
57 lines
2 KiB
C
57 lines
2 KiB
C
/* SPDX-License-Identifier: MIT */
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#ifndef __NVKM_PCI_H__
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#define __NVKM_PCI_H__
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#include <core/subdev.h>
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enum nvkm_pcie_speed {
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NVKM_PCIE_SPEED_2_5,
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NVKM_PCIE_SPEED_5_0,
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NVKM_PCIE_SPEED_8_0,
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};
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struct nvkm_pci {
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const struct nvkm_pci_func *func;
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struct nvkm_subdev subdev;
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struct pci_dev *pdev;
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struct {
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struct agp_bridge_data *bridge;
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u32 mode;
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u64 base;
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u64 size;
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int mtrr;
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bool cma;
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bool acquired;
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} agp;
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struct {
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enum nvkm_pcie_speed speed;
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u8 width;
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} pcie;
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bool msi;
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};
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u32 nvkm_pci_rd32(struct nvkm_pci *, u16 addr);
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void nvkm_pci_wr08(struct nvkm_pci *, u16 addr, u8 data);
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void nvkm_pci_wr32(struct nvkm_pci *, u16 addr, u32 data);
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u32 nvkm_pci_mask(struct nvkm_pci *, u16 addr, u32 mask, u32 value);
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void nvkm_pci_rom_shadow(struct nvkm_pci *, bool shadow);
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void nvkm_pci_msi_rearm(struct nvkm_device *);
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int nv04_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int nv40_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int nv46_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int nv4c_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int g84_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int g92_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int g94_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int gf100_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int gf106_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int gk104_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int gp100_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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int gh100_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **);
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/* pcie functions */
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int nvkm_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8 width);
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#endif
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