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d208261e9f
Our hardware registers are set through GCE, not by the CPU.
DRM might assume the hardware is disabled immediately after calling
atomic_disable() of drm_plane, but it is only truly disabled after the
GCE IRQ is triggered.
Additionally, the cursor plane in DRM uses async_commit, so DRM will
not wait for vblank and will free the buffer immediately after calling
atomic_disable().
To prevent the framebuffer from being freed before the layer disable
settings are configured into the hardware, which can cause an IOMMU
fault error, a wait_event_timeout has been added to wait for the
ddp_cmdq_cb() callback,indicating that the GCE IRQ has been triggered.
Fixes: 2f965be7f9 ("drm/mediatek: apply CMDQ control flow")
Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20250624113223.443274-1-jason-jh.lin@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
29 lines
918 B
C
29 lines
918 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015 MediaTek Inc.
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*/
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#ifndef MTK_CRTC_H
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#define MTK_CRTC_H
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#include <drm/drm_crtc.h>
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#include "mtk_ddp_comp.h"
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#include "mtk_drm_drv.h"
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#include "mtk_plane.h"
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#define MTK_MAX_BPC 10
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#define MTK_MIN_BPC 3
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void mtk_crtc_commit(struct drm_crtc *crtc);
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int mtk_crtc_create(struct drm_device *drm_dev, const unsigned int *path,
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unsigned int path_len, int priv_data_index,
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const struct mtk_drm_route *conn_routes,
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unsigned int num_conn_routes);
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int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
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struct mtk_plane_state *state);
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void mtk_crtc_plane_disable(struct drm_crtc *crtc, struct drm_plane *plane);
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void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,
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struct drm_atomic_state *plane_state);
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struct device *mtk_crtc_dma_dev_get(struct drm_crtc *crtc);
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#endif /* MTK_CRTC_H */
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