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5efc58e409
Many selftests call igt_flush_test() on cleanup. With default preemption timeout of compute engines raised to 7.5 seconds, hardcoded flush timeout of 3 seconds is too short. That results in GPU forcibly wedged and kernel taineted, then IGT abort triggered. CI BAT runs loose a part of their expected coverage. Calculate the flush timeout based on the longest preemption timeout currently configured for any engine. That way, selftest can still report detected issues as non-critical, and the GPU gets a chance to recover from preemptible hangs and prepare for fluent execution of next test cases. Link: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20241213190122.513709-2-janusz.krzysztofik@linux.intel.com
51 lines
1 KiB
C
51 lines
1 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2018 Intel Corporation
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*/
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#include "gt/intel_gt.h"
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#include "gt/intel_gt_requests.h"
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#include "i915_drv.h"
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#include "i915_selftest.h"
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#include "igt_flush_test.h"
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int igt_flush_test(struct drm_i915_private *i915)
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{
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struct intel_gt *gt;
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unsigned int i;
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int ret = 0;
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for_each_gt(gt, i915, i) {
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struct intel_engine_cs *engine;
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unsigned long timeout_ms = 0;
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unsigned int id;
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if (intel_gt_is_wedged(gt))
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ret = -EIO;
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for_each_engine(engine, gt, id) {
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if (engine->props.preempt_timeout_ms > timeout_ms)
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timeout_ms = engine->props.preempt_timeout_ms;
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}
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cond_resched();
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/* 2x longest preempt timeout, experimentally determined */
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if (intel_gt_wait_for_idle(gt, HZ * timeout_ms / 500) == -ETIME) {
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pr_err("%pS timed out, cancelling all further testing.\n",
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__builtin_return_address(0));
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GEM_TRACE("%pS timed out.\n",
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__builtin_return_address(0));
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GEM_TRACE_DUMP();
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intel_gt_set_wedged(gt);
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ret = -EIO;
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}
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}
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return ret;
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}
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