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c206a27eb7
In dkl_phy_set_hip_idx(), we may try to shift a value negatively, whose behavior is undefined. This can happen because we define TC_PORT_NONE to -1, so theoretically tc_port could be -1. We will then use tc_port to shift to the correct address of the specified port, but if it's negative, anything can happen. If this happens or tc_port exceeds I915_MAX_TC_PORTS, it's safer to return with a warning than risk an invalid write. Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250520082917.1302665-2-luciano.coelho@intel.com
117 lines
2.8 KiB
C
117 lines
2.8 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include <drm/drm_device.h>
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#include <drm/drm_print.h>
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#include "intel_de.h"
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#include "intel_display.h"
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#include "intel_dkl_phy.h"
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#include "intel_dkl_phy_regs.h"
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/**
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* intel_dkl_phy_init - initialize Dekel PHY
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* @display: display device instance
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*/
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void intel_dkl_phy_init(struct intel_display *display)
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{
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spin_lock_init(&display->dkl.phy_lock);
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}
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static void
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dkl_phy_set_hip_idx(struct intel_display *display, struct intel_dkl_phy_reg reg)
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{
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enum tc_port tc_port = DKL_REG_TC_PORT(reg);
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if (drm_WARN_ON(display->drm,
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tc_port < TC_PORT_1 || tc_port >= I915_MAX_TC_PORTS))
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return;
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intel_de_write(display,
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HIP_INDEX_REG(tc_port),
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HIP_INDEX_VAL(tc_port, reg.bank_idx));
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}
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/**
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* intel_dkl_phy_read - read a Dekel PHY register
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* @display: intel_display device instance
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* @reg: Dekel PHY register
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*
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* Read the @reg Dekel PHY register.
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*
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* Returns the read value.
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*/
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u32
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intel_dkl_phy_read(struct intel_display *display, struct intel_dkl_phy_reg reg)
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{
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u32 val;
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spin_lock(&display->dkl.phy_lock);
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dkl_phy_set_hip_idx(display, reg);
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val = intel_de_read(display, DKL_REG_MMIO(reg));
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spin_unlock(&display->dkl.phy_lock);
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return val;
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}
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/**
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* intel_dkl_phy_write - write a Dekel PHY register
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* @display: intel_display device instance
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* @reg: Dekel PHY register
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* @val: value to write
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*
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* Write @val to the @reg Dekel PHY register.
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*/
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void
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intel_dkl_phy_write(struct intel_display *display, struct intel_dkl_phy_reg reg, u32 val)
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{
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spin_lock(&display->dkl.phy_lock);
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dkl_phy_set_hip_idx(display, reg);
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intel_de_write(display, DKL_REG_MMIO(reg), val);
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spin_unlock(&display->dkl.phy_lock);
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}
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/**
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* intel_dkl_phy_rmw - read-modify-write a Dekel PHY register
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* @display: display device instance
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* @reg: Dekel PHY register
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* @clear: mask to clear
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* @set: mask to set
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*
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* Read the @reg Dekel PHY register, clearing then setting the @clear/@set bits in it, and writing
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* this value back to the register if the value differs from the read one.
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*/
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void
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intel_dkl_phy_rmw(struct intel_display *display, struct intel_dkl_phy_reg reg, u32 clear, u32 set)
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{
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spin_lock(&display->dkl.phy_lock);
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dkl_phy_set_hip_idx(display, reg);
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intel_de_rmw(display, DKL_REG_MMIO(reg), clear, set);
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spin_unlock(&display->dkl.phy_lock);
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}
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/**
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* intel_dkl_phy_posting_read - do a posting read from a Dekel PHY register
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* @display: display device instance
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* @reg: Dekel PHY register
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*
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* Read the @reg Dekel PHY register without returning the read value.
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*/
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void
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intel_dkl_phy_posting_read(struct intel_display *display, struct intel_dkl_phy_reg reg)
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{
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spin_lock(&display->dkl.phy_lock);
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dkl_phy_set_hip_idx(display, reg);
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intel_de_posting_read(display, DKL_REG_MMIO(reg));
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spin_unlock(&display->dkl.phy_lock);
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}
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