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1e7f35512e
Because the drm_aux of struct hibmc_dp_dev's member is not easy to get in hibmc_drm_dp.c, move the drm_aux to struct hibmc_dp. Then there are some adaptations and modifications to make this patch compile. Signed-off-by: Baihan Li <libaihan@huawei.com> Signed-off-by: Yongbang Shi <shiyongbang@huawei.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250331074212.3370287-5-shiyongbang@huawei.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
69 lines
1.7 KiB
C
69 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* Copyright (c) 2024 Hisilicon Limited. */
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#ifndef DP_COMM_H
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#define DP_COMM_H
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#include <linux/types.h>
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/mutex.h>
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#include <linux/kernel.h>
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#include <linux/bitfield.h>
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#include <linux/io.h>
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#include <drm/display/drm_dp_helper.h>
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#include "dp_hw.h"
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#define HIBMC_DP_LANE_NUM_MAX 2
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struct hibmc_link_status {
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bool clock_recovered;
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bool channel_equalized;
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};
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struct hibmc_link_cap {
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u8 link_rate;
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u8 lanes;
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};
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struct hibmc_dp_link {
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struct hibmc_link_status status;
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u8 train_set[HIBMC_DP_LANE_NUM_MAX];
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struct hibmc_link_cap cap;
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};
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struct hibmc_dp_dev {
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struct drm_dp_aux *aux;
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struct drm_device *dev;
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void __iomem *base;
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struct mutex lock; /* protects concurrent RW in hibmc_dp_reg_write_field() */
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struct hibmc_dp_link link;
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u8 dpcd[DP_RECEIVER_CAP_SIZE];
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void __iomem *serdes_base;
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};
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#define dp_field_modify(reg_value, mask, val) \
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do { \
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(reg_value) &= ~(mask); \
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(reg_value) |= FIELD_PREP(mask, val); \
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} while (0) \
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#define hibmc_dp_reg_write_field(dp, offset, mask, val) \
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do { \
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typeof(dp) _dp = dp; \
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typeof(_dp->base) addr = (_dp->base + (offset)); \
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mutex_lock(&_dp->lock); \
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u32 reg_value = readl(addr); \
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dp_field_modify(reg_value, mask, val); \
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writel(reg_value, addr); \
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mutex_unlock(&_dp->lock); \
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} while (0)
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void hibmc_dp_aux_init(struct hibmc_dp *dp);
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int hibmc_dp_link_training(struct hibmc_dp_dev *dp);
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int hibmc_dp_serdes_init(struct hibmc_dp_dev *dp);
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int hibmc_dp_serdes_rate_switch(u8 rate, struct hibmc_dp_dev *dp);
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int hibmc_dp_serdes_set_tx_cfg(struct hibmc_dp_dev *dp, u8 train_set[HIBMC_DP_LANE_NUM_MAX]);
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#endif
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