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12b3d697c8
From Dave [1]: """ It was a mistake to introduce core/acpi.c and putting ACPI dependency on cxl_core when adding the extended linear cache support. """ Current implementation calls hmat_get_extended_linear_cache_size() of the ACPI subsystem. That external reference causes issue running cxl_test as there is no way to "mock" that function and ignore it when using cxl test. Instead of working around that using cxlrd ops and extensively expanding cxl_test code [1], just move HMAT calls out of the core module to cxl_acpi. Implement this by adding a @cache_size member to struct cxl_root_decoder. During initialization the cache size is determined and added to the root decoder object in cxl_acpi. Later on in cxl_core the cache_size parameter is used to setup extended linear caching. [1] https://patch.msgid.link/20250610172938.139428-1-dave.jiang@intel.com [ dj: Remove core/acpi.o from tools/testing/cxl/Kbuild ] [ dj: Add kdoc for cxlrd->cache_size ] Cc: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Robert Richter <rrichter@amd.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://patch.msgid.link/20250711151529.787470-1-rrichter@amd.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
22 lines
620 B
Makefile
22 lines
620 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_CXL_BUS) += cxl_core.o
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obj-$(CONFIG_CXL_SUSPEND) += suspend.o
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ccflags-y += -I$(srctree)/drivers/cxl
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CFLAGS_trace.o = -DTRACE_INCLUDE_PATH=. -I$(src)
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cxl_core-y := port.o
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cxl_core-y += pmem.o
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cxl_core-y += regs.o
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cxl_core-y += memdev.o
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cxl_core-y += mbox.o
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cxl_core-y += pci.o
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cxl_core-y += hdm.o
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cxl_core-y += pmu.o
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cxl_core-y += cdat.o
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cxl_core-y += ras.o
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cxl_core-$(CONFIG_TRACING) += trace.o
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cxl_core-$(CONFIG_CXL_REGION) += region.o
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cxl_core-$(CONFIG_CXL_MCE) += mce.o
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cxl_core-$(CONFIG_CXL_FEATURES) += features.o
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cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) += edac.o
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