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9739f5f93b
Add support for the Inside Secure SafeXcel EIP-93 Crypto Engine used on Mediatek MT7621 SoC and new Airoha SoC. EIP-93 IP supports AES/DES/3DES ciphers in ECB/CBC and CTR modes as well as authenc(HMAC(x), cipher(y)) using HMAC MD5, SHA1, SHA224 and SHA256. EIP-93 provide regs to signal support for specific chipers and the driver dynamically register only the supported one by the chip. Signed-off-by: Richard van Schagen <vschagen@icloud.com> Co-developed-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
151 lines
3.9 KiB
C
151 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (C) 2019 - 2021
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*
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* Richard van Schagen <vschagen@icloud.com>
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* Christian Marangi <ansuelsmth@gmail.com
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*/
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#ifndef _EIP93_MAIN_H_
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#define _EIP93_MAIN_H_
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#include <crypto/internal/aead.h>
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#include <crypto/internal/hash.h>
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#include <crypto/internal/skcipher.h>
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#include <linux/bitfield.h>
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#include <linux/interrupt.h>
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#define EIP93_RING_BUSY_DELAY 500
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#define EIP93_RING_NUM 512
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#define EIP93_RING_BUSY 32
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#define EIP93_CRA_PRIORITY 1500
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#define EIP93_RING_SA_STATE_ADDR(base, idx) ((base) + (idx))
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#define EIP93_RING_SA_STATE_DMA(dma_base, idx) ((u32 __force)(dma_base) + \
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((idx) * sizeof(struct sa_state)))
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/* cipher algorithms */
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#define EIP93_ALG_DES BIT(0)
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#define EIP93_ALG_3DES BIT(1)
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#define EIP93_ALG_AES BIT(2)
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#define EIP93_ALG_MASK GENMASK(2, 0)
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/* hash and hmac algorithms */
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#define EIP93_HASH_MD5 BIT(3)
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#define EIP93_HASH_SHA1 BIT(4)
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#define EIP93_HASH_SHA224 BIT(5)
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#define EIP93_HASH_SHA256 BIT(6)
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#define EIP93_HASH_HMAC BIT(7)
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#define EIP93_HASH_MASK GENMASK(6, 3)
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/* cipher modes */
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#define EIP93_MODE_CBC BIT(8)
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#define EIP93_MODE_ECB BIT(9)
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#define EIP93_MODE_CTR BIT(10)
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#define EIP93_MODE_RFC3686 BIT(11)
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#define EIP93_MODE_MASK GENMASK(10, 8)
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/* cipher encryption/decryption operations */
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#define EIP93_ENCRYPT BIT(12)
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#define EIP93_DECRYPT BIT(13)
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#define EIP93_BUSY BIT(14)
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/* descriptor flags */
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#define EIP93_DESC_DMA_IV BIT(0)
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#define EIP93_DESC_IPSEC BIT(1)
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#define EIP93_DESC_FINISH BIT(2)
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#define EIP93_DESC_LAST BIT(3)
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#define EIP93_DESC_FAKE_HMAC BIT(4)
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#define EIP93_DESC_PRNG BIT(5)
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#define EIP93_DESC_HASH BIT(6)
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#define EIP93_DESC_AEAD BIT(7)
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#define EIP93_DESC_SKCIPHER BIT(8)
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#define EIP93_DESC_ASYNC BIT(9)
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#define IS_DMA_IV(desc_flags) ((desc_flags) & EIP93_DESC_DMA_IV)
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#define IS_DES(flags) ((flags) & EIP93_ALG_DES)
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#define IS_3DES(flags) ((flags) & EIP93_ALG_3DES)
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#define IS_AES(flags) ((flags) & EIP93_ALG_AES)
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#define IS_HASH_MD5(flags) ((flags) & EIP93_HASH_MD5)
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#define IS_HASH_SHA1(flags) ((flags) & EIP93_HASH_SHA1)
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#define IS_HASH_SHA224(flags) ((flags) & EIP93_HASH_SHA224)
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#define IS_HASH_SHA256(flags) ((flags) & EIP93_HASH_SHA256)
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#define IS_HMAC(flags) ((flags) & EIP93_HASH_HMAC)
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#define IS_CBC(mode) ((mode) & EIP93_MODE_CBC)
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#define IS_ECB(mode) ((mode) & EIP93_MODE_ECB)
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#define IS_CTR(mode) ((mode) & EIP93_MODE_CTR)
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#define IS_RFC3686(mode) ((mode) & EIP93_MODE_RFC3686)
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#define IS_BUSY(flags) ((flags) & EIP93_BUSY)
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#define IS_ENCRYPT(dir) ((dir) & EIP93_ENCRYPT)
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#define IS_DECRYPT(dir) ((dir) & EIP93_DECRYPT)
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#define IS_CIPHER(flags) ((flags) & (EIP93_ALG_DES | \
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EIP93_ALG_3DES | \
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EIP93_ALG_AES))
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#define IS_HASH(flags) ((flags) & (EIP93_HASH_MD5 | \
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EIP93_HASH_SHA1 | \
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EIP93_HASH_SHA224 | \
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EIP93_HASH_SHA256))
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/**
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* struct eip93_device - crypto engine device structure
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*/
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struct eip93_device {
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void __iomem *base;
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struct device *dev;
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struct clk *clk;
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int irq;
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struct eip93_ring *ring;
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};
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struct eip93_desc_ring {
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void *base;
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void *base_end;
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dma_addr_t base_dma;
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/* write and read pointers */
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void *read;
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void *write;
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/* descriptor element offset */
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u32 offset;
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};
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struct eip93_state_pool {
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void *base;
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dma_addr_t base_dma;
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};
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struct eip93_ring {
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struct tasklet_struct done_task;
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/* command/result rings */
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struct eip93_desc_ring cdr;
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struct eip93_desc_ring rdr;
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spinlock_t write_lock;
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spinlock_t read_lock;
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/* aync idr */
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spinlock_t idr_lock;
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struct idr crypto_async_idr;
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};
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enum eip93_alg_type {
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EIP93_ALG_TYPE_AEAD,
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EIP93_ALG_TYPE_SKCIPHER,
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EIP93_ALG_TYPE_HASH,
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};
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struct eip93_alg_template {
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struct eip93_device *eip93;
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enum eip93_alg_type type;
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u32 flags;
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union {
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struct aead_alg aead;
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struct skcipher_alg skcipher;
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struct ahash_alg ahash;
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} alg;
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};
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#endif /* _EIP93_MAIN_H_ */
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