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9739f5f93b
Add support for the Inside Secure SafeXcel EIP-93 Crypto Engine used on Mediatek MT7621 SoC and new Airoha SoC. EIP-93 IP supports AES/DES/3DES ciphers in ECB/CBC and CTR modes as well as authenc(HMAC(x), cipher(y)) using HMAC MD5, SHA1, SHA224 and SHA256. EIP-93 provide regs to signal support for specific chipers and the driver dynamically register only the supported one by the chip. Signed-off-by: Richard van Schagen <vschagen@icloud.com> Co-developed-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
82 lines
2 KiB
C
82 lines
2 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (C) 2019 - 2021
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*
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* Richard van Schagen <vschagen@icloud.com>
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* Christian Marangi <ansuelsmth@gmail.com
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*/
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#ifndef _EIP93_HASH_H_
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#define _EIP93_HASH_H_
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#include <crypto/sha2.h>
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#include "eip93-main.h"
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#include "eip93-regs.h"
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struct eip93_hash_ctx {
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struct eip93_device *eip93;
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u32 flags;
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u8 ipad[SHA256_BLOCK_SIZE] __aligned(sizeof(u32));
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u8 opad[SHA256_DIGEST_SIZE] __aligned(sizeof(u32));
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};
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struct eip93_hash_reqctx {
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/* Placement is important for DMA align */
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struct {
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struct sa_record sa_record;
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struct sa_record sa_record_hmac;
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struct sa_state sa_state;
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} __aligned(CRYPTO_DMA_ALIGN);
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dma_addr_t sa_record_base;
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dma_addr_t sa_record_hmac_base;
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dma_addr_t sa_state_base;
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/* Don't enable HASH_FINALIZE when last block is sent */
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bool partial_hash;
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/* Set to signal interrupt is for final packet */
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bool finalize;
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/*
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* EIP93 requires data to be accumulated in block of 64 bytes
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* for intermediate hash calculation.
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*/
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u64 len;
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u32 data_used;
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u8 data[SHA256_BLOCK_SIZE] __aligned(sizeof(u32));
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dma_addr_t data_dma;
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struct list_head blocks;
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};
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struct mkt_hash_block {
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struct list_head list;
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u8 data[SHA256_BLOCK_SIZE] __aligned(sizeof(u32));
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dma_addr_t data_dma;
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};
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struct eip93_hash_export_state {
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u64 len;
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u32 data_used;
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u32 state_len[2];
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u8 state_hash[SHA256_DIGEST_SIZE] __aligned(sizeof(u32));
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u8 data[SHA256_BLOCK_SIZE] __aligned(sizeof(u32));
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};
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void eip93_hash_handle_result(struct crypto_async_request *async, int err);
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extern struct eip93_alg_template eip93_alg_md5;
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extern struct eip93_alg_template eip93_alg_sha1;
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extern struct eip93_alg_template eip93_alg_sha224;
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extern struct eip93_alg_template eip93_alg_sha256;
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extern struct eip93_alg_template eip93_alg_hmac_md5;
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extern struct eip93_alg_template eip93_alg_hmac_sha1;
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extern struct eip93_alg_template eip93_alg_hmac_sha224;
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extern struct eip93_alg_template eip93_alg_hmac_sha256;
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#endif /* _EIP93_HASH_H_ */
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