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In amd-pstate-ut, one of the basic test is to switch between all possible mode combinations. After running this test the mode of the amd-pstate driver is active mode. Store and reset the mode to its original state. Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Swapnil Sapkal <swapnil.sapkal@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20250430064206.7402-1-swapnil.sapkal@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
127 lines
4.1 KiB
C
127 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2022 Advanced Micro Devices, Inc.
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*
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* Author: Meng Li <li.meng@amd.com>
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*/
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#ifndef _LINUX_AMD_PSTATE_H
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#define _LINUX_AMD_PSTATE_H
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#include <linux/pm_qos.h>
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/*********************************************************************
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* AMD P-state INTERFACE *
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*********************************************************************/
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/**
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* union perf_cached - A union to cache performance-related data.
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* @highest_perf: the maximum performance an individual processor may reach,
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* assuming ideal conditions
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* For platforms that support the preferred core feature, the highest_perf value maybe
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* configured to any value in the range 166-255 by the firmware (because the preferred
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* core ranking is encoded in the highest_perf value). To maintain consistency across
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* all platforms, we split the highest_perf and preferred core ranking values into
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* cpudata->perf.highest_perf and cpudata->prefcore_ranking.
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* @nominal_perf: the maximum sustained performance level of the processor,
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* assuming ideal operating conditions
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* @lowest_nonlinear_perf: the lowest performance level at which nonlinear power
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* savings are achieved
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* @lowest_perf: the absolute lowest performance level of the processor
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* @min_limit_perf: Cached value of the performance corresponding to policy->min
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* @max_limit_perf: Cached value of the performance corresponding to policy->max
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* @bios_min_perf: Cached perf value corresponding to the "Requested CPU Min Frequency" BIOS option
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*/
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union perf_cached {
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struct {
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u8 highest_perf;
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u8 nominal_perf;
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u8 lowest_nonlinear_perf;
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u8 lowest_perf;
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u8 min_limit_perf;
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u8 max_limit_perf;
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u8 bios_min_perf;
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};
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u64 val;
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};
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/**
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* struct amd_aperf_mperf
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* @aperf: actual performance frequency clock count
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* @mperf: maximum performance frequency clock count
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* @tsc: time stamp counter
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*/
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struct amd_aperf_mperf {
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u64 aperf;
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u64 mperf;
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u64 tsc;
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};
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/**
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* struct amd_cpudata - private CPU data for AMD P-State
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* @cpu: CPU number
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* @req: constraint request to apply
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* @cppc_req_cached: cached performance request hints
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* @perf: cached performance-related data
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* @prefcore_ranking: the preferred core ranking, the higher value indicates a higher
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* priority.
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* @min_limit_freq: Cached value of policy->min (in khz)
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* @max_limit_freq: Cached value of policy->max (in khz)
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* @nominal_freq: the frequency (in khz) that mapped to nominal_perf
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* @lowest_nonlinear_freq: the frequency (in khz) that mapped to lowest_nonlinear_perf
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* @cur: Difference of Aperf/Mperf/tsc count between last and current sample
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* @prev: Last Aperf/Mperf/tsc count value read from register
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* @freq: current cpu frequency value (in khz)
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* @boost_supported: check whether the Processor or SBIOS supports boost mode
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* @hw_prefcore: check whether HW supports preferred core featue.
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* Only when hw_prefcore and early prefcore param are true,
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* AMD P-State driver supports preferred core featue.
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* @epp_cached: Cached CPPC energy-performance preference value
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* @policy: Cpufreq policy value
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*
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* The amd_cpudata is key private data for each CPU thread in AMD P-State, and
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* represents all the attributes and goals that AMD P-State requests at runtime.
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*/
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struct amd_cpudata {
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int cpu;
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struct freq_qos_request req[2];
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u64 cppc_req_cached;
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union perf_cached perf;
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u8 prefcore_ranking;
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u32 min_limit_freq;
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u32 max_limit_freq;
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u32 nominal_freq;
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u32 lowest_nonlinear_freq;
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struct amd_aperf_mperf cur;
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struct amd_aperf_mperf prev;
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u64 freq;
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bool boost_supported;
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bool hw_prefcore;
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/* EPP feature related attributes*/
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u32 policy;
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bool suspended;
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u8 epp_default;
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};
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/*
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* enum amd_pstate_mode - driver working mode of amd pstate
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*/
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enum amd_pstate_mode {
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AMD_PSTATE_UNDEFINED = 0,
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AMD_PSTATE_DISABLE,
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AMD_PSTATE_PASSIVE,
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AMD_PSTATE_ACTIVE,
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AMD_PSTATE_GUIDED,
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AMD_PSTATE_MAX,
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};
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const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode);
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int amd_pstate_get_status(void);
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int amd_pstate_update_status(const char *buf, size_t size);
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#endif /* _LINUX_AMD_PSTATE_H */
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