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e16b9b71f4
Some clocks in the Allwinner A523 SoC contain an "update bit" (bit 27), which must be set to apply any register changes, namely the mux selector, the divider and the gate bit. Add a new CCU feature bit to mark those clocks, and set bit 27 whenever we are applying any changes. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250307002628.10684-4-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
86 lines
2.1 KiB
C
86 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2016 Maxime Ripard. All rights reserved.
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*/
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#ifndef _COMMON_H_
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#define _COMMON_H_
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#include <linux/compiler.h>
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#include <linux/clk-provider.h>
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#define CCU_FEATURE_FRACTIONAL BIT(0)
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#define CCU_FEATURE_VARIABLE_PREDIV BIT(1)
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#define CCU_FEATURE_FIXED_PREDIV BIT(2)
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#define CCU_FEATURE_FIXED_POSTDIV BIT(3)
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#define CCU_FEATURE_ALL_PREDIV BIT(4)
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#define CCU_FEATURE_LOCK_REG BIT(5)
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#define CCU_FEATURE_MMC_TIMING_SWITCH BIT(6)
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#define CCU_FEATURE_SIGMA_DELTA_MOD BIT(7)
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#define CCU_FEATURE_KEY_FIELD BIT(8)
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#define CCU_FEATURE_CLOSEST_RATE BIT(9)
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#define CCU_FEATURE_DUAL_DIV BIT(10)
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#define CCU_FEATURE_UPDATE_BIT BIT(11)
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/* MMC timing mode switch bit */
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#define CCU_MMC_NEW_TIMING_MODE BIT(30)
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/* Some clocks need this bit to actually apply register changes */
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#define CCU_SUNXI_UPDATE_BIT BIT(27)
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struct device_node;
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struct ccu_common {
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void __iomem *base;
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u16 reg;
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u16 lock_reg;
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u32 prediv;
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unsigned long min_rate;
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unsigned long max_rate;
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unsigned long features;
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spinlock_t *lock;
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struct clk_hw hw;
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};
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static inline struct ccu_common *hw_to_ccu_common(struct clk_hw *hw)
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{
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return container_of(hw, struct ccu_common, hw);
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}
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struct sunxi_ccu_desc {
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struct ccu_common **ccu_clks;
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unsigned long num_ccu_clks;
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struct clk_hw_onecell_data *hw_clks;
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const struct ccu_reset_map *resets;
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unsigned long num_resets;
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};
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void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock);
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bool ccu_is_better_rate(struct ccu_common *common,
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unsigned long target_rate,
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unsigned long current_rate,
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unsigned long best_rate);
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struct ccu_pll_nb {
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struct notifier_block clk_nb;
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struct ccu_common *common;
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u32 enable;
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u32 lock;
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};
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#define to_ccu_pll_nb(_nb) container_of(_nb, struct ccu_pll_nb, clk_nb)
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int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb);
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int devm_sunxi_ccu_probe(struct device *dev, void __iomem *reg,
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const struct sunxi_ccu_desc *desc);
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void of_sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
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const struct sunxi_ccu_desc *desc);
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#endif /* _COMMON_H_ */
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