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9a497710ca
Add clock support for SAMA7D65 SoC. Increase maximum number of valid master clocks. The PMC for the SAMA7D65 requires 9 master clocks. Increase maximum amount of PLLs to 9 to support SAMA7D65 SoC PLL requirements. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/549fa8590fe9b4380e413f8eed87392f28754395.1734723585.git.Ryan.Wanner@microchip.com [claudiu.beznea: sorted alphanumerically the Makefile entries, reorder the code for resource cleanup in sama7d65_pmc_setup()] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
28 lines
1.2 KiB
Makefile
28 lines
1.2 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for at91 specific clk
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#
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obj-y += pmc.o sckc.o
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obj-y += clk-slow.o clk-main.o clk-pll.o clk-plldiv.o clk-master.o
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obj-y += clk-system.o clk-peripheral.o clk-programmable.o
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obj-$(CONFIG_HAVE_AT91_AUDIO_PLL) += clk-audio-pll.o
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obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o
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obj-$(CONFIG_HAVE_AT91_USB_CLK) += clk-usb.o
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obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o
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obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o
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obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o
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obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o
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obj-$(CONFIG_HAVE_AT91_SAM9X60_PLL) += clk-sam9x60-pll.o
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obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o dt-compat.o
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obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o at91sam9rl.o at91sam9x5.o dt-compat.o
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obj-$(CONFIG_SOC_AT91SAM9) += at91sam9g45.o dt-compat.o
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obj-$(CONFIG_SOC_AT91SAM9) += at91sam9n12.o at91sam9x5.o dt-compat.o
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obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o
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obj-$(CONFIG_SOC_SAM9X7) += sam9x7.o
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obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o dt-compat.o
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obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o dt-compat.o
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obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o dt-compat.o
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obj-$(CONFIG_SOC_SAMA7D65) += sama7d65.o
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obj-$(CONFIG_SOC_SAMA7G5) += sama7g5.o
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