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16d743606d
The presence or absence of the CPPC SBI extension is currently logged on every boot. This message is not particularly useful and can clutter the boot log. Remove this debug message to reduce noise during boot. This change has no functional impact. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Drew Fustini <fustini@kernel.org> Link: https://lore.kernel.org/r/20250711140013.3043463-1-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
155 lines
3.4 KiB
C
155 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Implement CPPC FFH helper routines for RISC-V.
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*
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* Copyright (C) 2024 Ventana Micro Systems Inc.
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*/
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#include <acpi/cppc_acpi.h>
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#include <asm/csr.h>
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#include <asm/sbi.h>
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#define SBI_EXT_CPPC 0x43505043
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/* CPPC interfaces defined in SBI spec */
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#define SBI_CPPC_PROBE 0x0
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#define SBI_CPPC_READ 0x1
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#define SBI_CPPC_READ_HI 0x2
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#define SBI_CPPC_WRITE 0x3
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/* RISC-V FFH definitions from RISC-V FFH spec */
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#define FFH_CPPC_TYPE(r) (((r) & GENMASK_ULL(63, 60)) >> 60)
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#define FFH_CPPC_SBI_REG(r) ((r) & GENMASK(31, 0))
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#define FFH_CPPC_CSR_NUM(r) ((r) & GENMASK(11, 0))
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#define FFH_CPPC_SBI 0x1
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#define FFH_CPPC_CSR 0x2
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struct sbi_cppc_data {
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u64 val;
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u32 reg;
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struct sbiret ret;
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};
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static bool cppc_ext_present;
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static int __init sbi_cppc_init(void)
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{
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if (sbi_spec_version >= sbi_mk_version(2, 0) &&
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sbi_probe_extension(SBI_EXT_CPPC) > 0) {
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cppc_ext_present = true;
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} else {
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cppc_ext_present = false;
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}
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return 0;
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}
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device_initcall(sbi_cppc_init);
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static void sbi_cppc_read(void *read_data)
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{
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struct sbi_cppc_data *data = (struct sbi_cppc_data *)read_data;
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data->ret = sbi_ecall(SBI_EXT_CPPC, SBI_CPPC_READ,
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data->reg, 0, 0, 0, 0, 0);
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}
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static void sbi_cppc_write(void *write_data)
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{
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struct sbi_cppc_data *data = (struct sbi_cppc_data *)write_data;
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data->ret = sbi_ecall(SBI_EXT_CPPC, SBI_CPPC_WRITE,
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data->reg, data->val, 0, 0, 0, 0);
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}
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static void cppc_ffh_csr_read(void *read_data)
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{
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struct sbi_cppc_data *data = (struct sbi_cppc_data *)read_data;
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switch (data->reg) {
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/* Support only TIME CSR for now */
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case CSR_TIME:
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data->ret.value = csr_read(CSR_TIME);
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data->ret.error = 0;
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break;
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default:
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data->ret.error = -EINVAL;
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break;
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}
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}
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static void cppc_ffh_csr_write(void *write_data)
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{
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struct sbi_cppc_data *data = (struct sbi_cppc_data *)write_data;
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data->ret.error = -EINVAL;
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}
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/*
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* Refer to drivers/acpi/cppc_acpi.c for the description of the functions
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* below.
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*/
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bool cpc_ffh_supported(void)
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{
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return true;
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}
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int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *val)
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{
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struct sbi_cppc_data data;
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if (WARN_ON_ONCE(irqs_disabled()))
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return -EPERM;
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if (FFH_CPPC_TYPE(reg->address) == FFH_CPPC_SBI) {
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if (!cppc_ext_present)
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return -EINVAL;
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data.reg = FFH_CPPC_SBI_REG(reg->address);
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smp_call_function_single(cpu, sbi_cppc_read, &data, 1);
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*val = data.ret.value;
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return (data.ret.error) ? sbi_err_map_linux_errno(data.ret.error) : 0;
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} else if (FFH_CPPC_TYPE(reg->address) == FFH_CPPC_CSR) {
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data.reg = FFH_CPPC_CSR_NUM(reg->address);
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smp_call_function_single(cpu, cppc_ffh_csr_read, &data, 1);
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*val = data.ret.value;
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return (data.ret.error) ? sbi_err_map_linux_errno(data.ret.error) : 0;
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}
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return -EINVAL;
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}
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int cpc_write_ffh(int cpu, struct cpc_reg *reg, u64 val)
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{
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struct sbi_cppc_data data;
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if (WARN_ON_ONCE(irqs_disabled()))
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return -EPERM;
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if (FFH_CPPC_TYPE(reg->address) == FFH_CPPC_SBI) {
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if (!cppc_ext_present)
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return -EINVAL;
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data.reg = FFH_CPPC_SBI_REG(reg->address);
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data.val = val;
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smp_call_function_single(cpu, sbi_cppc_write, &data, 1);
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return (data.ret.error) ? sbi_err_map_linux_errno(data.ret.error) : 0;
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} else if (FFH_CPPC_TYPE(reg->address) == FFH_CPPC_CSR) {
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data.reg = FFH_CPPC_CSR_NUM(reg->address);
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data.val = val;
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smp_call_function_single(cpu, cppc_ffh_csr_write, &data, 1);
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return (data.ret.error) ? sbi_err_map_linux_errno(data.ret.error) : 0;
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}
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return -EINVAL;
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}
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