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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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e486147c91
Add amdxdna_gem_prime_export() and amdxdna_gem_prime_import() for BO import and export. Register mmu notifier for imported BO as well. When MMU_NOTIFIER_UNMAP event is received, queue work to remove the notifier. The same BO could be mapped multiple times if it is exported and imported by an application. Use a link list to track VMAs the BO been mapped. v2: Rebased and call get_dma_buf() before dma_buf_attach() v3: Removed import_attach usage Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://lore.kernel.org/r/20250325200105.2744079-1-lizhi.hou@amd.com
149 lines
4.3 KiB
C
149 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
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*/
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#ifndef _AMDXDNA_PCI_DRV_H_
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#define _AMDXDNA_PCI_DRV_H_
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#include <linux/workqueue.h>
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#include <linux/xarray.h>
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#define XDNA_INFO(xdna, fmt, args...) drm_info(&(xdna)->ddev, fmt, ##args)
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#define XDNA_WARN(xdna, fmt, args...) drm_warn(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
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#define XDNA_ERR(xdna, fmt, args...) drm_err(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
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#define XDNA_DBG(xdna, fmt, args...) drm_dbg(&(xdna)->ddev, fmt, ##args)
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#define XDNA_INFO_ONCE(xdna, fmt, args...) drm_info_once(&(xdna)->ddev, fmt, ##args)
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#define XDNA_MBZ_DBG(xdna, ptr, sz) \
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({ \
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int __i; \
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int __ret = 0; \
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u8 *__ptr = (u8 *)(ptr); \
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for (__i = 0; __i < (sz); __i++) { \
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if (__ptr[__i]) { \
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XDNA_DBG(xdna, "MBZ check failed"); \
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__ret = -EINVAL; \
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break; \
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} \
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} \
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__ret; \
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})
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#define to_xdna_dev(drm_dev) \
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((struct amdxdna_dev *)container_of(drm_dev, struct amdxdna_dev, ddev))
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extern const struct drm_driver amdxdna_drm_drv;
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struct amdxdna_client;
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struct amdxdna_dev;
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struct amdxdna_drm_get_info;
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struct amdxdna_drm_set_state;
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struct amdxdna_gem_obj;
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struct amdxdna_hwctx;
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struct amdxdna_sched_job;
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/*
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* struct amdxdna_dev_ops - Device hardware operation callbacks
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*/
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struct amdxdna_dev_ops {
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int (*init)(struct amdxdna_dev *xdna);
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void (*fini)(struct amdxdna_dev *xdna);
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int (*resume)(struct amdxdna_dev *xdna);
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void (*suspend)(struct amdxdna_dev *xdna);
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int (*hwctx_init)(struct amdxdna_hwctx *hwctx);
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void (*hwctx_fini)(struct amdxdna_hwctx *hwctx);
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int (*hwctx_config)(struct amdxdna_hwctx *hwctx, u32 type, u64 value, void *buf, u32 size);
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void (*hmm_invalidate)(struct amdxdna_gem_obj *abo, unsigned long cur_seq);
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void (*hwctx_suspend)(struct amdxdna_hwctx *hwctx);
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void (*hwctx_resume)(struct amdxdna_hwctx *hwctx);
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int (*cmd_submit)(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job, u64 *seq);
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int (*get_aie_info)(struct amdxdna_client *client, struct amdxdna_drm_get_info *args);
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int (*set_aie_state)(struct amdxdna_client *client, struct amdxdna_drm_set_state *args);
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};
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/*
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* struct amdxdna_dev_info - Device hardware information
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* Record device static information, like reg, mbox, PSP, SMU bar index
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*/
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struct amdxdna_dev_info {
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int reg_bar;
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int mbox_bar;
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int sram_bar;
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int psp_bar;
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int smu_bar;
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int device_type;
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int first_col;
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u32 dev_mem_buf_shift;
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u64 dev_mem_base;
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size_t dev_mem_size;
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char *vbnv;
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const struct amdxdna_dev_priv *dev_priv;
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const struct amdxdna_dev_ops *ops;
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};
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struct amdxdna_fw_ver {
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u32 major;
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u32 minor;
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u32 sub;
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u32 build;
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};
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struct amdxdna_dev {
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struct drm_device ddev;
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struct amdxdna_dev_hdl *dev_handle;
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const struct amdxdna_dev_info *dev_info;
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void *xrs_hdl;
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struct mutex dev_lock; /* per device lock */
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struct list_head client_list;
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struct amdxdna_fw_ver fw_ver;
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struct rw_semaphore notifier_lock; /* for mmu notifier*/
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struct workqueue_struct *notifier_wq;
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};
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/*
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* struct amdxdna_device_id - PCI device info
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*/
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struct amdxdna_device_id {
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unsigned short device;
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u8 revision;
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const struct amdxdna_dev_info *dev_info;
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};
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/*
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* struct amdxdna_client - amdxdna client
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* A per fd data structure for managing context and other user process stuffs.
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*/
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struct amdxdna_client {
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struct list_head node;
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pid_t pid;
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struct mutex hwctx_lock; /* protect hwctx */
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/* do NOT wait this srcu when hwctx_lock is held */
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struct srcu_struct hwctx_srcu;
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struct xarray hwctx_xa;
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u32 next_hwctxid;
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struct amdxdna_dev *xdna;
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struct drm_file *filp;
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struct mutex mm_lock; /* protect memory related */
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struct amdxdna_gem_obj *dev_heap;
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struct iommu_sva *sva;
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int pasid;
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};
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#define amdxdna_for_each_hwctx(client, hwctx_id, entry) \
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xa_for_each(&(client)->hwctx_xa, hwctx_id, entry)
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/* Add device info below */
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extern const struct amdxdna_dev_info dev_npu1_info;
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extern const struct amdxdna_dev_info dev_npu2_info;
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extern const struct amdxdna_dev_info dev_npu4_info;
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extern const struct amdxdna_dev_info dev_npu5_info;
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extern const struct amdxdna_dev_info dev_npu6_info;
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int amdxdna_sysfs_init(struct amdxdna_dev *xdna);
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void amdxdna_sysfs_fini(struct amdxdna_dev *xdna);
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#endif /* _AMDXDNA_PCI_DRV_H_ */
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