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4b455f5994
Currently if architectures want to support HOTPLUG_SMT they need to provide a topology_is_primary_thread() telling the framework which thread in the SMT cannot offline. However arm64 doesn't have a restriction on which thread in the SMT cannot offline, a simplest choice is that just make 1st thread as the "primary" thread. So just make this as the default implementation in the framework and let architectures like x86 that have special primary thread to override this function (which they've already done). There's no need to provide a stub function if !CONFIG_SMP or !CONFIG_HOTPLUG_SMT. In such case the testing CPU is already the 1st CPU in the SMT so it's always the primary thread. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250311075143.61078-2-yangyicong@huawei.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
318 lines
8.7 KiB
C
318 lines
8.7 KiB
C
/*
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* Written by: Matthew Dobson, IBM Corporation
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*
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* Copyright (C) 2002, IBM Corp.
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <colpatch@us.ibm.com>
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*/
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#ifndef _ASM_X86_TOPOLOGY_H
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#define _ASM_X86_TOPOLOGY_H
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/*
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* to preserve the visibility of NUMA_NO_NODE definition,
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* moved to there from here. May be used independent of
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* CONFIG_NUMA.
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*/
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#include <linux/numa.h>
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#include <linux/cpumask.h>
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#ifdef CONFIG_NUMA
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#include <asm/mpspec.h>
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#include <asm/percpu.h>
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/* Mappings between logical cpu number and node number */
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DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);
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#ifdef CONFIG_DEBUG_PER_CPU_MAPS
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/*
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* override generic percpu implementation of cpu_to_node
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*/
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extern int __cpu_to_node(int cpu);
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#define cpu_to_node __cpu_to_node
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extern int early_cpu_to_node(int cpu);
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#else /* !CONFIG_DEBUG_PER_CPU_MAPS */
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/* Same function but used if called before per_cpu areas are setup */
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static inline int early_cpu_to_node(int cpu)
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{
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return early_per_cpu(x86_cpu_to_node_map, cpu);
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}
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#endif /* !CONFIG_DEBUG_PER_CPU_MAPS */
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/* Mappings between node number and cpus on that node. */
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extern cpumask_var_t node_to_cpumask_map[MAX_NUMNODES];
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#ifdef CONFIG_DEBUG_PER_CPU_MAPS
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extern const struct cpumask *cpumask_of_node(int node);
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#else
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/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
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static inline const struct cpumask *cpumask_of_node(int node)
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{
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return node_to_cpumask_map[node];
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}
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#endif
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extern void setup_node_to_cpumask_map(void);
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#define pcibus_to_node(bus) __pcibus_to_node(bus)
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extern int __node_distance(int, int);
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#define node_distance(a, b) __node_distance(a, b)
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#else /* !CONFIG_NUMA */
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static inline int numa_node_id(void)
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{
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return 0;
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}
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/*
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* indicate override:
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*/
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#define numa_node_id numa_node_id
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static inline int early_cpu_to_node(int cpu)
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{
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return 0;
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}
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static inline void setup_node_to_cpumask_map(void) { }
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#endif
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#include <asm-generic/topology.h>
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/* Topology information */
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enum x86_topology_domains {
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TOPO_SMT_DOMAIN,
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TOPO_CORE_DOMAIN,
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TOPO_MODULE_DOMAIN,
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TOPO_TILE_DOMAIN,
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TOPO_DIE_DOMAIN,
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TOPO_DIEGRP_DOMAIN,
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TOPO_PKG_DOMAIN,
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TOPO_MAX_DOMAIN,
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};
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enum x86_topology_cpu_type {
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TOPO_CPU_TYPE_PERFORMANCE,
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TOPO_CPU_TYPE_EFFICIENCY,
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TOPO_CPU_TYPE_UNKNOWN,
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};
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struct x86_topology_system {
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unsigned int dom_shifts[TOPO_MAX_DOMAIN];
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unsigned int dom_size[TOPO_MAX_DOMAIN];
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};
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extern struct x86_topology_system x86_topo_system;
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static inline unsigned int topology_get_domain_size(enum x86_topology_domains dom)
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{
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return x86_topo_system.dom_size[dom];
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}
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static inline unsigned int topology_get_domain_shift(enum x86_topology_domains dom)
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{
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return dom == TOPO_SMT_DOMAIN ? 0 : x86_topo_system.dom_shifts[dom - 1];
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}
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extern const struct cpumask *cpu_coregroup_mask(int cpu);
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extern const struct cpumask *cpu_clustergroup_mask(int cpu);
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#define topology_logical_package_id(cpu) (cpu_data(cpu).topo.logical_pkg_id)
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#define topology_physical_package_id(cpu) (cpu_data(cpu).topo.pkg_id)
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#define topology_logical_die_id(cpu) (cpu_data(cpu).topo.logical_die_id)
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#define topology_logical_core_id(cpu) (cpu_data(cpu).topo.logical_core_id)
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#define topology_die_id(cpu) (cpu_data(cpu).topo.die_id)
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#define topology_core_id(cpu) (cpu_data(cpu).topo.core_id)
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#define topology_ppin(cpu) (cpu_data(cpu).ppin)
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#define topology_amd_node_id(cpu) (cpu_data(cpu).topo.amd_node_id)
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extern unsigned int __max_dies_per_package;
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extern unsigned int __max_logical_packages;
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extern unsigned int __max_threads_per_core;
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extern unsigned int __num_threads_per_package;
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extern unsigned int __num_cores_per_package;
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const char *get_topology_cpu_type_name(struct cpuinfo_x86 *c);
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enum x86_topology_cpu_type get_topology_cpu_type(struct cpuinfo_x86 *c);
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static inline unsigned int topology_max_packages(void)
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{
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return __max_logical_packages;
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}
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static inline unsigned int topology_max_dies_per_package(void)
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{
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return __max_dies_per_package;
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}
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static inline unsigned int topology_num_cores_per_package(void)
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{
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return __num_cores_per_package;
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}
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static inline unsigned int topology_num_threads_per_package(void)
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{
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return __num_threads_per_package;
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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int topology_get_logical_id(u32 apicid, enum x86_topology_domains at_level);
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#else
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static inline int topology_get_logical_id(u32 apicid, enum x86_topology_domains at_level)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_SMP
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#define topology_cluster_id(cpu) (cpu_data(cpu).topo.l2c_id)
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#define topology_die_cpumask(cpu) (per_cpu(cpu_die_map, cpu))
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#define topology_cluster_cpumask(cpu) (cpu_clustergroup_mask(cpu))
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#define topology_core_cpumask(cpu) (per_cpu(cpu_core_map, cpu))
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#define topology_sibling_cpumask(cpu) (per_cpu(cpu_sibling_map, cpu))
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static inline int topology_phys_to_logical_pkg(unsigned int pkg)
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{
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return topology_get_logical_id(pkg << x86_topo_system.dom_shifts[TOPO_PKG_DOMAIN],
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TOPO_PKG_DOMAIN);
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}
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extern int __max_smt_threads;
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static inline int topology_max_smt_threads(void)
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{
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return __max_smt_threads;
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}
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#include <linux/cpu_smt.h>
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extern unsigned int __amd_nodes_per_pkg;
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static inline unsigned int topology_amd_nodes_per_pkg(void)
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{
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return __amd_nodes_per_pkg;
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}
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extern struct cpumask __cpu_primary_thread_mask;
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#define cpu_primary_thread_mask ((const struct cpumask *)&__cpu_primary_thread_mask)
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/**
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* topology_is_primary_thread - Check whether CPU is the primary SMT thread
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* @cpu: CPU to check
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*/
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static inline bool topology_is_primary_thread(unsigned int cpu)
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{
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return cpumask_test_cpu(cpu, cpu_primary_thread_mask);
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}
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#define topology_is_primary_thread topology_is_primary_thread
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#else /* CONFIG_SMP */
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static inline int topology_phys_to_logical_pkg(unsigned int pkg) { return 0; }
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static inline int topology_max_smt_threads(void) { return 1; }
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static inline unsigned int topology_amd_nodes_per_pkg(void) { return 1; }
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#endif /* !CONFIG_SMP */
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static inline void arch_fix_phys_package_id(int num, u32 slot)
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{
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}
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struct pci_bus;
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int x86_pci_root_bus_node(int bus);
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void x86_pci_root_bus_resources(int bus, struct list_head *resources);
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extern bool x86_topology_update;
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#ifdef CONFIG_SCHED_MC_PRIO
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#include <asm/percpu.h>
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DECLARE_PER_CPU_READ_MOSTLY(int, sched_core_priority);
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extern bool __read_mostly sysctl_sched_itmt_enabled;
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/* Interface to set priority of a cpu */
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void sched_set_itmt_core_prio(int prio, int core_cpu);
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/* Interface to notify scheduler that system supports ITMT */
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int sched_set_itmt_support(void);
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/* Interface to notify scheduler that system revokes ITMT support */
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void sched_clear_itmt_support(void);
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#else /* CONFIG_SCHED_MC_PRIO */
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#define sysctl_sched_itmt_enabled false
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static inline void sched_set_itmt_core_prio(int prio, int core_cpu)
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{
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}
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static inline int sched_set_itmt_support(void)
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{
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return 0;
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}
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static inline void sched_clear_itmt_support(void)
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{
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}
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#endif /* CONFIG_SCHED_MC_PRIO */
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#if defined(CONFIG_SMP) && defined(CONFIG_X86_64)
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#include <asm/cpufeature.h>
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DECLARE_STATIC_KEY_FALSE(arch_scale_freq_key);
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#define arch_scale_freq_invariant() static_branch_likely(&arch_scale_freq_key)
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DECLARE_PER_CPU(unsigned long, arch_freq_scale);
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static inline long arch_scale_freq_capacity(int cpu)
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{
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return per_cpu(arch_freq_scale, cpu);
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}
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#define arch_scale_freq_capacity arch_scale_freq_capacity
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bool arch_enable_hybrid_capacity_scale(void);
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void arch_set_cpu_capacity(int cpu, unsigned long cap, unsigned long max_cap,
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unsigned long cap_freq, unsigned long base_freq);
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unsigned long arch_scale_cpu_capacity(int cpu);
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#define arch_scale_cpu_capacity arch_scale_cpu_capacity
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extern void arch_set_max_freq_ratio(bool turbo_disabled);
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extern void freq_invariance_set_perf_ratio(u64 ratio, bool turbo_disabled);
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#else
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static inline bool arch_enable_hybrid_capacity_scale(void) { return false; }
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static inline void arch_set_cpu_capacity(int cpu, unsigned long cap,
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unsigned long max_cap,
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unsigned long cap_freq,
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unsigned long base_freq) { }
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static inline void arch_set_max_freq_ratio(bool turbo_disabled) { }
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static inline void freq_invariance_set_perf_ratio(u64 ratio, bool turbo_disabled) { }
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#endif
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extern void arch_scale_freq_tick(void);
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#define arch_scale_freq_tick arch_scale_freq_tick
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#endif /* _ASM_X86_TOPOLOGY_H */
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