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24a295e4ef
While the GCC and Clang compilers already define __ASSEMBLER__ automatically when compiling assembly code, __ASSEMBLY__ is a macro that only gets defined by the Makefiles in the kernel. This can be very confusing when switching between userspace and kernelspace coding, or when dealing with UAPI headers that rather should use __ASSEMBLER__ instead. So let's standardize on the __ASSEMBLER__ macro that is provided by the compilers now. This is mostly a mechanical patch (done with a simple "sed -i" statement), with some manual tweaks in <asm/frame.h>, <asm/hw_irq.h> and <asm/setup.h> that mentioned this macro in comments with some missing underscores. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Brian Gerst <brgerst@gmail.com> Cc: Juergen Gross <jgross@suse.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Kees Cook <keescook@chromium.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lore.kernel.org/r/20250314071013.1575167-38-thuth@redhat.com
121 lines
2.7 KiB
C
121 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_IBT_H
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#define _ASM_X86_IBT_H
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#include <linux/types.h>
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/*
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* The rules for enabling IBT are:
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*
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* - CC_HAS_IBT: the toolchain supports it
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* - X86_KERNEL_IBT: it is selected in Kconfig
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* - !__DISABLE_EXPORTS: this is regular kernel code
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*
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* Esp. that latter one is a bit non-obvious, but some code like compressed,
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* purgatory, realmode etc.. is built with custom CFLAGS that do not include
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* -fcf-protection=branch and things will go *bang*.
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*
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* When all the above are satisfied, HAS_KERNEL_IBT will be 1, otherwise 0.
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*/
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#if defined(CONFIG_X86_KERNEL_IBT) && !defined(__DISABLE_EXPORTS)
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#define HAS_KERNEL_IBT 1
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#ifndef __ASSEMBLER__
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#ifdef CONFIG_X86_64
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#define ASM_ENDBR "endbr64\n\t"
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#else
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#define ASM_ENDBR "endbr32\n\t"
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#endif
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#define __noendbr __attribute__((nocf_check))
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/*
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* Create a dummy function pointer reference to prevent objtool from marking
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* the function as needing to be "sealed" (i.e. ENDBR converted to NOP by
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* apply_seal_endbr()).
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*/
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#define IBT_NOSEAL(fname) \
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".pushsection .discard.ibt_endbr_noseal\n\t" \
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_ASM_PTR fname "\n\t" \
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".popsection\n\t"
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static __always_inline __attribute_const__ u32 gen_endbr(void)
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{
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u32 endbr;
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/*
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* Generate ENDBR64 in a way that is sure to not result in
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* an ENDBR64 instruction as immediate.
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*/
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asm ( "mov $~0xfa1e0ff3, %[endbr]\n\t"
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"not %[endbr]\n\t"
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: [endbr] "=&r" (endbr) );
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return endbr;
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}
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static __always_inline __attribute_const__ u32 gen_endbr_poison(void)
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{
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/*
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* 4 byte NOP that isn't NOP4 (in fact it is OSP NOP3), such that it
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* will be unique to (former) ENDBR sites.
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*/
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return 0x001f0f66; /* osp nopl (%rax) */
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}
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static inline bool __is_endbr(u32 val)
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{
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if (val == gen_endbr_poison())
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return true;
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/* See cfi_fineibt_bhi_preamble() */
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if (IS_ENABLED(CONFIG_FINEIBT_BHI) && val == 0x001f0ff5)
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return true;
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val &= ~0x01000000U; /* ENDBR32 -> ENDBR64 */
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return val == gen_endbr();
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}
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extern __noendbr bool is_endbr(u32 *val);
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extern __noendbr u64 ibt_save(bool disable);
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extern __noendbr void ibt_restore(u64 save);
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#else /* __ASSEMBLER__ */
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#ifdef CONFIG_X86_64
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#define ENDBR endbr64
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#else
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#define ENDBR endbr32
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#endif
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#endif /* __ASSEMBLER__ */
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#else /* !IBT */
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#define HAS_KERNEL_IBT 0
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#ifndef __ASSEMBLER__
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#define ASM_ENDBR
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#define IBT_NOSEAL(name)
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#define __noendbr
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static inline bool is_endbr(u32 *val) { return false; }
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static inline u64 ibt_save(bool disable) { return 0; }
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static inline void ibt_restore(u64 save) { }
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#else /* __ASSEMBLER__ */
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#define ENDBR
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#endif /* __ASSEMBLER__ */
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#endif /* CONFIG_X86_KERNEL_IBT */
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#define ENDBR_INSN_SIZE (4*HAS_KERNEL_IBT)
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#endif /* _ASM_X86_IBT_H */
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