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efef7f184f
For historic reasons there are some TSC-related functions in the
<asm/msr.h> header, even though there's an <asm/tsc.h> header.
To facilitate the relocation of rdtsc{,_ordered}() from <asm/msr.h>
to <asm/tsc.h> and to eventually eliminate the inclusion of
<asm/msr.h> in <asm/tsc.h>, add an explicit <asm/msr.h> dependency
to the source files that reference definitions from <asm/msr.h>.
[ mingo: Clarified the changelog. ]
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Kees Cook <keescook@chromium.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Uros Bizjak <ubizjak@gmail.com>
Link: https://lore.kernel.org/r/20250501054241.1245648-1-xin@zytor.com
94 lines
2.2 KiB
C
94 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Hyper-V specific spinlock code.
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*
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* Copyright (C) 2018, Intel, Inc.
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*
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* Author : Yi Sun <yi.y.sun@intel.com>
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*/
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#define pr_fmt(fmt) "Hyper-V: " fmt
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#include <linux/spinlock.h>
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#include <asm/mshyperv.h>
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#include <asm/paravirt.h>
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#include <asm/apic.h>
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#include <asm/msr.h>
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static bool hv_pvspin __initdata = true;
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static void hv_qlock_kick(int cpu)
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{
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__apic_send_IPI(cpu, X86_PLATFORM_IPI_VECTOR);
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}
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static void hv_qlock_wait(u8 *byte, u8 val)
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{
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unsigned long flags;
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if (in_nmi())
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return;
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/*
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* Reading HV_X64_MSR_GUEST_IDLE MSR tells the hypervisor that the
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* vCPU can be put into 'idle' state. This 'idle' state is
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* terminated by an IPI, usually from hv_qlock_kick(), even if
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* interrupts are disabled on the vCPU.
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*
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* To prevent a race against the unlock path it is required to
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* disable interrupts before accessing the HV_X64_MSR_GUEST_IDLE
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* MSR. Otherwise, if the IPI from hv_qlock_kick() arrives between
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* the lock value check and the rdmsrq() then the vCPU might be put
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* into 'idle' state by the hypervisor and kept in that state for
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* an unspecified amount of time.
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*/
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local_irq_save(flags);
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/*
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* Only issue the rdmsrq() when the lock state has not changed.
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*/
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if (READ_ONCE(*byte) == val) {
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unsigned long msr_val;
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rdmsrq(HV_X64_MSR_GUEST_IDLE, msr_val);
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(void)msr_val;
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}
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local_irq_restore(flags);
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}
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/*
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* Hyper-V does not support this so far.
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*/
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__visible bool hv_vcpu_is_preempted(int vcpu)
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{
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return false;
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}
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PV_CALLEE_SAVE_REGS_THUNK(hv_vcpu_is_preempted);
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void __init hv_init_spinlocks(void)
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{
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if (!hv_pvspin || !apic ||
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!(ms_hyperv.hints & HV_X64_CLUSTER_IPI_RECOMMENDED) ||
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!(ms_hyperv.features & HV_MSR_GUEST_IDLE_AVAILABLE)) {
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pr_info("PV spinlocks disabled\n");
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return;
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}
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pr_info("PV spinlocks enabled\n");
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__pv_init_lock_hash();
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pv_ops.lock.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;
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pv_ops.lock.queued_spin_unlock = PV_CALLEE_SAVE(__pv_queued_spin_unlock);
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pv_ops.lock.wait = hv_qlock_wait;
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pv_ops.lock.kick = hv_qlock_kick;
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pv_ops.lock.vcpu_is_preempted = PV_CALLEE_SAVE(hv_vcpu_is_preempted);
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}
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static __init int hv_parse_nopvspin(char *arg)
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{
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hv_pvspin = false;
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return 0;
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}
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early_param("hv_nopvspin", hv_parse_nopvspin);
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