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Most of the SEV support code used to reside in a single C source file that was included in two places: the core kernel, and the decompressor. The code that is actually shared with the decompressor was moved into a separate, shared source file under startup/, on the basis that the decompressor also executes from the early 1:1 mapping of memory. However, while the elaborate #VC handling and instruction decoding that it involves is also performed by the decompressor, it does not actually occur in the core kernel at early boot, and therefore, does not need to be part of the confined early startup code. So split off the #VC handling code and move it back into arch/x86/coco where it came from, into another C source file that is included from both the decompressor and the core kernel. Code movement only - no functional change intended. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: David Woodhouse <dwmw@amazon.co.uk> Cc: Dionna Amalie Glaze <dionnaglaze@google.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Kees Cook <keescook@chromium.org> Cc: Kevin Loughlin <kevinloughlin@google.com> Cc: Len Brown <len.brown@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: linux-efi@vger.kernel.org Link: https://lore.kernel.org/r/20250504095230.2932860-31-ardb+git@google.com
44 lines
842 B
C
44 lines
842 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* AMD SEV header for early boot related functions.
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*
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* Author: Tom Lendacky <thomas.lendacky@amd.com>
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*/
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#ifndef BOOT_COMPRESSED_SEV_H
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#define BOOT_COMPRESSED_SEV_H
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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#include "../msr.h"
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void snp_accept_memory(phys_addr_t start, phys_addr_t end);
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u64 sev_get_status(void);
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bool early_is_sevsnp_guest(void);
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static inline u64 sev_es_rd_ghcb_msr(void)
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{
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struct msr m;
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boot_rdmsr(MSR_AMD64_SEV_ES_GHCB, &m);
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return m.q;
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}
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static inline void sev_es_wr_ghcb_msr(u64 val)
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{
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struct msr m;
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m.q = val;
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boot_wrmsr(MSR_AMD64_SEV_ES_GHCB, &m);
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}
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#else
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static inline void snp_accept_memory(phys_addr_t start, phys_addr_t end) { }
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static inline u64 sev_get_status(void) { return 0; }
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static inline bool early_is_sevsnp_guest(void) { return false; }
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#endif
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#endif
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