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2494fce26e
The ioread/iowrite functions on sh only do memory mapped I/O like the generic verion, and never map onto non-MMIO inb/outb variants, so they just add complexity. In particular, the use of asm-generic/iomap.h ties the declaration to the x86 implementation. Remove the custom versions and use the architecture-independent fallback code instead. Some of the calling conventions on sh are different here, so fix that by adding 'volatile' keywords where required by the generic implementation and change the cpg clock driver to no longer depend on the interesting choice of return types for ioread8/ioread16/ioread32. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
79 lines
1.9 KiB
C
79 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* arch/sh/lib/io.c - SH32 optimized I/O routines
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*
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* Copyright (C) 2000 Stuart Menefy
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* Copyright (C) 2005 Paul Mundt
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*
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* Provide real functions which expand to whatever the header file defined.
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* Also definitions of machine independent IO functions.
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*/
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#include <linux/module.h>
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#include <linux/io.h>
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void __raw_readsl(const volatile void __iomem *addr, void *datap, int len)
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{
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u32 *data;
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for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--)
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*data++ = __raw_readl(addr);
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if (likely(len >= (0x20 >> 2))) {
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int tmp2, tmp3, tmp4, tmp5, tmp6;
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__asm__ __volatile__(
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"1: \n\t"
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"mov.l @%7, r0 \n\t"
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"mov.l @%7, %2 \n\t"
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#ifdef CONFIG_CPU_SH4
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"movca.l r0, @%0 \n\t"
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#else
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"mov.l r0, @%0 \n\t"
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#endif
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"mov.l @%7, %3 \n\t"
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"mov.l @%7, %4 \n\t"
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"mov.l @%7, %5 \n\t"
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"mov.l @%7, %6 \n\t"
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"mov.l @%7, r7 \n\t"
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"mov.l @%7, r0 \n\t"
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"mov.l %2, @(0x04,%0) \n\t"
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"mov #0x20>>2, %2 \n\t"
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"mov.l %3, @(0x08,%0) \n\t"
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"sub %2, %1 \n\t"
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"mov.l %4, @(0x0c,%0) \n\t"
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"cmp/hi %1, %2 ! T if 32 > len \n\t"
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"mov.l %5, @(0x10,%0) \n\t"
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"mov.l %6, @(0x14,%0) \n\t"
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"mov.l r7, @(0x18,%0) \n\t"
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"mov.l r0, @(0x1c,%0) \n\t"
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"bf.s 1b \n\t"
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" add #0x20, %0 \n\t"
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: "=&r" (data), "=&r" (len),
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"=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4),
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"=&r" (tmp5), "=&r" (tmp6)
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: "r"(addr), "0" (data), "1" (len)
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: "r0", "r7", "t", "memory");
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}
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for (; len != 0; len--)
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*data++ = __raw_readl(addr);
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}
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EXPORT_SYMBOL(__raw_readsl);
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void __raw_writesl(volatile void __iomem *addr, const void *data, int len)
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{
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if (likely(len != 0)) {
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int tmp1;
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__asm__ __volatile__ (
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"1: \n\t"
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"mov.l @%0+, %1 \n\t"
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"dt %3 \n\t"
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"bf.s 1b \n\t"
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" mov.l %1, @%4 \n\t"
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: "=&r" (data), "=&r" (tmp1)
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: "0" (data), "r" (len), "r"(addr)
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: "t", "memory");
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}
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}
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EXPORT_SYMBOL(__raw_writesl);
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