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4797e9b506
Implement raw_smp_processor_id() with an inline assembly, which makes use of the ALTERNATIVE macro, to read cpu_nr from lowcore. Provide an alternative instruction with a different offset in case lowcore is relocated. This replaces sequences of two instructions with one instruction. Before: 1000b6: a5 1e 00 00 llilh %r1,0 1000ba: 58 20 13 a0 l %r2,928(%r1) After: 1000b6: e3 20 03 a0 00 58 ly %r2,928 Kernel image size change: add/remove: 753/755 grow/shrink: 230/1510 up/down: 30538/-35832 (-5294) Acked-by: Vasily Gorbik <gor@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
90 lines
2.6 KiB
C
90 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp. 1999, 2012
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* Author(s): Denis Joseph Barrow,
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* Martin Schwidefsky <schwidefsky@de.ibm.com>,
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*/
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#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#include <asm/processor.h>
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#include <asm/lowcore.h>
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#include <asm/machine.h>
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#include <asm/sigp.h>
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static __always_inline unsigned int raw_smp_processor_id(void)
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{
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unsigned long lc_cpu_nr;
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unsigned int cpu;
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BUILD_BUG_ON(sizeof_field(struct lowcore, cpu_nr) != sizeof(cpu));
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lc_cpu_nr = offsetof(struct lowcore, cpu_nr);
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asm_inline(
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ALTERNATIVE(" ly %[cpu],%[offzero](%%r0)\n",
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" ly %[cpu],%[offalt](%%r0)\n",
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ALT_FEATURE(MFEATURE_LOWCORE))
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: [cpu] "=d" (cpu)
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: [offzero] "i" (lc_cpu_nr),
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[offalt] "i" (lc_cpu_nr + LOWCORE_ALT_ADDRESS),
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"m" (((struct lowcore *)0)->cpu_nr));
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return cpu;
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}
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#define arch_scale_cpu_capacity smp_cpu_get_capacity
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extern struct mutex smp_cpu_state_mutex;
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extern unsigned int smp_cpu_mt_shift;
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extern unsigned int smp_cpu_mtid;
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extern __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
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extern cpumask_t cpu_setup_mask;
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extern int __cpu_up(unsigned int cpu, struct task_struct *tidle);
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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extern void smp_call_ipl_cpu(void (*func)(void *), void *);
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extern void smp_emergency_stop(void);
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extern int smp_find_processor_id(u16 address);
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extern int smp_store_status(int cpu);
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extern void smp_save_dump_ipl_cpu(void);
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extern void smp_save_dump_secondary_cpus(void);
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extern void smp_yield_cpu(int cpu);
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extern void smp_cpu_set_polarization(int cpu, int val);
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extern int smp_cpu_get_polarization(int cpu);
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extern void smp_cpu_set_capacity(int cpu, unsigned long val);
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extern void smp_set_core_capacity(int cpu, unsigned long val);
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extern unsigned long smp_cpu_get_capacity(int cpu);
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extern int smp_cpu_get_cpu_address(int cpu);
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extern void smp_fill_possible_mask(void);
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extern void smp_detect_cpus(void);
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static inline void smp_stop_cpu(void)
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{
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u16 pcpu = stap();
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for (;;) {
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__pcpu_sigp(pcpu, SIGP_STOP, 0, NULL);
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cpu_relax();
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}
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}
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/* Return thread 0 CPU number as base CPU */
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static inline int smp_get_base_cpu(int cpu)
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{
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return cpu - (cpu % (smp_cpu_mtid + 1));
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}
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static inline void smp_cpus_done(unsigned int max_cpus)
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{
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}
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extern int smp_rescan_cpus(bool early);
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extern void __noreturn cpu_die(void);
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extern void __cpu_die(unsigned int cpu);
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extern int __cpu_disable(void);
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extern void schedule_mcck_handler(void);
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void notrace smp_yield_cpu(int cpu);
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#endif /* __ASM_SMP_H */
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