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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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9343aaba1f
It seems a bit ridiculous to require toolchain support for BPF to assemble Zbb instructions, so move the dependency on toolchain support for Zbb optimisations out of the Kconfig option and to the callsites. Zbb support has always depended on alternatives, so while adjusting the config options guarding optimisations, remove any checks for whether or not alternatives are enabled. Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Link: https://lore.kernel.org/r/20241024-chump-freebase-d26b6d81af33@spud Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
141 lines
2.3 KiB
ArmAsm
141 lines
2.3 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#include <asm/alternative-macros.h>
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#include <asm/hwcap.h>
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/* int strncmp(const char *cs, const char *ct, size_t count) */
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SYM_FUNC_START(strncmp)
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__ALTERNATIVE_CFG("nop", "j strncmp_zbb", 0, RISCV_ISA_EXT_ZBB,
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IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB))
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/*
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* Returns
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* a0 - comparison result, value like strncmp
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*
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* Parameters
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* a0 - string1
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* a1 - string2
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* a2 - number of characters to compare
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*
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* Clobbers
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* t0, t1, t2
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*/
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li t2, 0
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1:
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beq a2, t2, 2f
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lbu t0, 0(a0)
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lbu t1, 0(a1)
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addi a0, a0, 1
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addi a1, a1, 1
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bne t0, t1, 3f
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addi t2, t2, 1
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bnez t0, 1b
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2:
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li a0, 0
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ret
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3:
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/*
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* strncmp only needs to return (< 0, 0, > 0) values
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* not necessarily -1, 0, +1
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*/
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sub a0, t0, t1
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ret
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/*
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* Variant of strncmp using the ZBB extension if available
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*/
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#if defined(CONFIG_RISCV_ISA_ZBB) && defined(CONFIG_TOOLCHAIN_HAS_ZBB)
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strncmp_zbb:
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.option push
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.option arch,+zbb
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/*
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* Returns
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* a0 - comparison result, like strncmp
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*
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* Parameters
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* a0 - string1
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* a1 - string2
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* a2 - number of characters to compare
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*
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* Clobbers
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* t0, t1, t2, t3, t4, t5, t6
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*/
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or t2, a0, a1
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li t5, -1
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and t2, t2, SZREG-1
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add t4, a0, a2
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bnez t2, 3f
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/* Adjust limit for fast-path. */
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andi t6, t4, -SZREG
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/* Main loop for aligned string. */
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.p2align 3
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1:
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bge a0, t6, 3f
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REG_L t0, 0(a0)
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REG_L t1, 0(a1)
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orc.b t3, t0
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bne t3, t5, 2f
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orc.b t3, t1
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bne t3, t5, 2f
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addi a0, a0, SZREG
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addi a1, a1, SZREG
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beq t0, t1, 1b
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/*
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* Words don't match, and no null byte in the first
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* word. Get bytes in big-endian order and compare.
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*/
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#ifndef CONFIG_CPU_BIG_ENDIAN
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rev8 t0, t0
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rev8 t1, t1
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#endif
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/* Synthesize (t0 >= t1) ? 1 : -1 in a branchless sequence. */
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sltu a0, t0, t1
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neg a0, a0
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ori a0, a0, 1
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ret
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2:
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/*
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* Found a null byte.
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* If words don't match, fall back to simple loop.
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*/
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bne t0, t1, 3f
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/* Otherwise, strings are equal. */
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li a0, 0
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ret
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/* Simple loop for misaligned strings. */
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.p2align 3
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3:
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bge a0, t4, 5f
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lbu t0, 0(a0)
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lbu t1, 0(a1)
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addi a0, a0, 1
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addi a1, a1, 1
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bne t0, t1, 4f
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bnez t0, 3b
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4:
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sub a0, t0, t1
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ret
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5:
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li a0, 0
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ret
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.option pop
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#endif
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SYM_FUNC_END(strncmp)
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SYM_FUNC_ALIAS(__pi_strncmp, strncmp)
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EXPORT_SYMBOL(strncmp)
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