linux/arch/riscv/include/asm/vendor_extensions/andes.h
Charlie Jenkins 23c996fc2b
riscv: Extend cpufeature.c to detect vendor extensions
Instead of grouping all vendor extensions into the same riscv_isa_ext
that standard instructions use, create a struct
"riscv_isa_vendor_ext_data_list" that allows each vendor to maintain
their vendor extensions independently of the standard extensions.
xandespmu is currently the only vendor extension so that is the only
extension that is affected by this change.

An additional benefit of this is that the extensions of each vendor can
be conditionally enabled. A config RISCV_ISA_VENDOR_EXT_ANDES has been
added to allow for that.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andy Chiu <andy.chiu@sifive.com>
Tested-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Link: https://lore.kernel.org/r/20240719-support_vendor_extensions-v3-1-0af7587bbec0@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2024-07-22 15:36:54 -07:00

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C

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_VENDOR_EXTENSIONS_ANDES_H
#define _ASM_RISCV_VENDOR_EXTENSIONS_ANDES_H
#include <asm/vendor_extensions.h>
#include <linux/types.h>
#define RISCV_ISA_VENDOR_EXT_XANDESPMU 0
/*
* Extension keys should be strictly less than max.
* It is safe to increment this when necessary.
*/
#define RISCV_ISA_VENDOR_EXT_MAX_ANDES 32
extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_andes;
#endif