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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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9343aaba1f
It seems a bit ridiculous to require toolchain support for BPF to assemble Zbb instructions, so move the dependency on toolchain support for Zbb optimisations out of the Kconfig option and to the callsites. Zbb support has always depended on alternatives, so while adjusting the config options guarding optimisations, remove any checks for whether or not alternatives are enabled. Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Link: https://lore.kernel.org/r/20241024-chump-freebase-d26b6d81af33@spud Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
78 lines
1.6 KiB
C
78 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Based on arch/x86/include/asm/arch_hweight.h
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*/
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#ifndef _ASM_RISCV_HWEIGHT_H
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#define _ASM_RISCV_HWEIGHT_H
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#include <asm/alternative-macros.h>
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#include <asm/hwcap.h>
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#if (BITS_PER_LONG == 64)
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#define CPOPW "cpopw "
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#elif (BITS_PER_LONG == 32)
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#define CPOPW "cpop "
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#else
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#error "Unexpected BITS_PER_LONG"
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#endif
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static __always_inline unsigned int __arch_hweight32(unsigned int w)
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{
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#if defined(CONFIG_RISCV_ISA_ZBB) && defined(CONFIG_TOOLCHAIN_HAS_ZBB)
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asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
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RISCV_ISA_EXT_ZBB, 1)
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: : : : legacy);
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asm (".option push\n"
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".option arch,+zbb\n"
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CPOPW "%0, %1\n"
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".option pop\n"
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: "=r" (w) : "r" (w) :);
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return w;
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legacy:
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#endif
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return __sw_hweight32(w);
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}
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static inline unsigned int __arch_hweight16(unsigned int w)
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{
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return __arch_hweight32(w & 0xffff);
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}
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static inline unsigned int __arch_hweight8(unsigned int w)
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{
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return __arch_hweight32(w & 0xff);
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}
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#if BITS_PER_LONG == 64
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static __always_inline unsigned long __arch_hweight64(__u64 w)
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{
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#if defined(CONFIG_RISCV_ISA_ZBB) && defined(CONFIG_TOOLCHAIN_HAS_ZBB)
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asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
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RISCV_ISA_EXT_ZBB, 1)
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: : : : legacy);
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asm (".option push\n"
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".option arch,+zbb\n"
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"cpop %0, %1\n"
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".option pop\n"
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: "=r" (w) : "r" (w) :);
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return w;
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legacy:
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#endif
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return __sw_hweight64(w);
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}
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#else /* BITS_PER_LONG == 64 */
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static inline unsigned long __arch_hweight64(__u64 w)
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{
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return __arch_hweight32((u32)w) +
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__arch_hweight32((u32)(w >> 32));
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}
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#endif /* !(BITS_PER_LONG == 64) */
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#endif /* _ASM_RISCV_HWEIGHT_H */
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