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IBM Cell Blades used the Cell processor and the "blade" server form factor. They were sold as models QS20, QS21 & QS22 from roughly 2006 to 2012 [1]. They were used in a few supercomputers (eg. Roadrunner) that have since been dismantled, and were not that widely used otherwise. Until recently I still had a working QS22, which meant I was able to keep the platform support working, but unfortunately that machine has now died. I'm not aware of any users. If there is a user that wants to keep the upstream support working, we can look at bringing some of the code back as appropriate. See previous discussion at [2]. Remove the top-level config symbol PPC_IBM_CELL_BLADE, and then the dependent symbols PPC_CELL_NATIVE, PPC_CELL_COMMON, CBE_RAS, PPC_IBM_CELL_RESETBUTTON, PPC_IBM_CELL_POWERBUTTON, CBE_THERM, and AXON_MSI. Then remove the associated C files and headers, and trim unused header content (some is shared with PS3). Note that PPC_CELL_COMMON sounds like it would build code shared with PS3, but it does not. It's a relic from when code was shared between the Blade support and QPACE support. Most of the primary authors already have CREDITS entries, with the exception of Christian, so add one for him. [1]: https://www.theregister.com/2011/06/28/ibm_kills_qs22_blade [2]: https://lore.kernel.org/linuxppc-dev/60581044-df82-40ad-b94c-56468007a93e@app.fastmail.com Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jeremy Kerr <jk@ozlabs.org> Acked-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20241218105523.416573-1-mpe@ellerman.id.au
31 lines
1 KiB
C
31 lines
1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* cbe_regs.h
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*
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* This file is intended to hold the various register definitions for CBE
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* on-chip system devices (memory controller, IO controller, etc...)
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*
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* (C) Copyright IBM Corporation 2001,2006
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*
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* Authors: Maximino Aguilar (maguilar@us.ibm.com)
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* David J. Erb (djerb@us.ibm.com)
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*
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* (c) 2006 Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
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*/
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#ifndef CBE_REGS_H
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#define CBE_REGS_H
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#include <asm/cell-pmu.h>
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/* Cell page table entries */
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#define CBE_IOPTE_PP_W 0x8000000000000000ul /* protection: write */
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#define CBE_IOPTE_PP_R 0x4000000000000000ul /* protection: read */
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#define CBE_IOPTE_M 0x2000000000000000ul /* coherency required */
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#define CBE_IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */
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#define CBE_IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */
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#define CBE_IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */
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#define CBE_IOPTE_H 0x0000000000000800ul /* cache hint */
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#define CBE_IOPTE_IOID_Mask 0x00000000000007fful /* ioid */
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#endif /* CBE_REGS_H */
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