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fdd544482e
MT7620A devices all contain a wifi device as part of the SOC. Add it here to get it working. Signed-off-by: Rosen Penev <rosenp@gmail.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://patch.msgid.link/20250722212856.11343-7-rosenp@gmail.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
75 lines
1.4 KiB
Text
75 lines
1.4 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ralink,mtk7620a-soc";
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cpus {
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cpu@0 {
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compatible = "mips,mips24KEc";
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};
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};
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cpuintc: cpuintc {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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palmbus@10000000 {
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compatible = "palmbus";
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reg = <0x10000000 0x200000>;
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ranges = <0x0 0x10000000 0x1FFFFF>;
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#address-cells = <1>;
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#size-cells = <1>;
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sysc: syscon@0 {
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compatible = "ralink,mt7620-sysc", "syscon";
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reg = <0x0 0x100>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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intc: intc@200 {
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compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
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reg = <0x200 0x100>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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memc@300 {
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compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
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reg = <0x300 0x100>;
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};
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uartlite@c00 {
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compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
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reg = <0xc00 0x100>;
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clocks = <&sysc MT7620_CLK_UARTLITE>;
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interrupt-parent = <&intc>;
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interrupts = <12>;
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reg-shift = <2>;
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};
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};
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wmac: wifi@10180000 {
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compatible = "ralink,rt2880-wifi";
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reg = <0x10180000 0x40000>;
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clocks = <&sysc 16>;
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interrupt-parent = <&cpuintc>;
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interrupts = <6>;
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};
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};
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