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f8523d0e83
Loongson-3A R1/R2/R3 and Loongson-3B R1/R2 use the same package naming in dts, and Loongson-3A R4 will be different. In cpu.h the classic 64bit Loongson processors are called Loongson64C (C for classic, pre Loongson- 3A R4), and the new 64bit Loongson processors are called Loongson64G (G for generic, Loongson-3A R4+). To keep consistency and make extensible, we rename the classic "loongson3" prefix to "loongson64c", and the new prefix for Loongson-3A R4+ will be "loongson64g". Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
64 lines
1.5 KiB
Text
64 lines
1.5 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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cpuintc: interrupt-controller {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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package0: bus@1fe00000 {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
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0 0x3ff00000 0 0x3ff00000 0x100000
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/* 3A HT Config Space */
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0xefd 0xfb000000 0xefd 0xfb000000 0x10000000
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/* 3B HT Config Space */
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0x1efd 0xfb000000 0x1efd 0xfb000000 0x10000000>;
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liointc: interrupt-controller@3ff01400 {
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compatible = "loongson,liointc-1.0";
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reg = <0 0x3ff01400 0x64>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>, <3>;
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interrupt-names = "int0", "int1";
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loongson,parent_int_map = <0xf0ffffff>, /* int0 */
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<0x0f000000>, /* int1 */
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<0x00000000>, /* int2 */
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<0x00000000>; /* int3 */
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};
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cpu_uart0: serial@1fe001e0 {
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compatible = "ns16550a";
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reg = <0 0x1fe001e0 0x8>;
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clock-frequency = <33000000>;
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interrupt-parent = <&liointc>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
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no-loopback-test;
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};
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cpu_uart1: serial@1fe001e8 {
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status = "disabled";
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compatible = "ns16550a";
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reg = <0 0x1fe001e8 0x8>;
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clock-frequency = <33000000>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&liointc>;
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no-loopback-test;
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};
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};
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};
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