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86758b5048
ioremap_prot() currently accepts pgprot_val parameter as an unsigned long, thus implicitly assuming that pgprot_val and pgprot_t could never be bigger than unsigned long. But this assumption soon will not be true on arm64 when using D128 pgtables. In 128 bit page table configuration, unsigned long is 64 bit, but pgprot_t is 128 bit. Passing platform abstracted pgprot_t argument is better as compared to size based data types. Let's change the parameter to directly pass pgprot_t like another similar helper generic_ioremap_prot(). Without this change in place, D128 configuration does not work on arm64 as the top 64 bits gets silently stripped when passing the protection value to this function. Link: https://lkml.kernel.org/r/20250218101954.415331-1-anshuman.khandual@arm.com Signed-off-by: Ryan Roberts <ryan.roberts@arm.com> Co-developed-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> [arm64] Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
88 lines
2.5 KiB
C
88 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#ifndef _ASM_IO_H
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#define _ASM_IO_H
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <asm/addrspace.h>
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#include <asm/cpu.h>
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#include <asm/page.h>
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#include <asm/pgtable-bits.h>
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#include <asm/string.h>
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extern void __init __iomem *early_ioremap(u64 phys_addr, unsigned long size);
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extern void __init early_iounmap(void __iomem *addr, unsigned long size);
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#define early_memremap early_ioremap
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#define early_memunmap early_iounmap
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#ifdef CONFIG_ARCH_IOREMAP
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static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
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pgprot_t prot)
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{
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switch (pgprot_val(prot) & _CACHE_MASK) {
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case _CACHE_CC:
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return (void __iomem *)(unsigned long)(CACHE_BASE + offset);
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case _CACHE_SUC:
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return (void __iomem *)(unsigned long)(UNCACHE_BASE + offset);
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case _CACHE_WUC:
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return (void __iomem *)(unsigned long)(WRITECOMBINE_BASE + offset);
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default:
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return NULL;
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}
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}
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#define ioremap(offset, size) \
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ioremap_prot((offset), (size), PAGE_KERNEL_SUC)
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#define iounmap(addr) ((void)(addr))
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#endif
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/*
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* On LoongArch, ioremap() has two variants, ioremap_wc() and ioremap_cache().
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* They map bus memory into CPU space, the mapped memory is marked uncachable
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* (_CACHE_SUC), uncachable but accelerated by write-combine (_CACHE_WUC) and
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* cachable (_CACHE_CC) respectively for CPU access.
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*
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* @offset: bus address of the memory
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* @size: size of the resource to map
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*/
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#define ioremap_wc(offset, size) \
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ioremap_prot((offset), (size), \
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wc_enabled ? PAGE_KERNEL_WUC : PAGE_KERNEL_SUC)
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#define ioremap_cache(offset, size) \
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ioremap_prot((offset), (size), PAGE_KERNEL)
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#define mmiowb() wmb()
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#define __io_aw() mmiowb()
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#ifdef CONFIG_KFENCE
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#define virt_to_phys(kaddr) \
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({ \
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(likely((unsigned long)kaddr < vm_map_base)) ? __pa((unsigned long)kaddr) : \
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page_to_phys(tlb_virt_to_page((unsigned long)kaddr)) + offset_in_page((unsigned long)kaddr);\
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})
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#define phys_to_virt(paddr) \
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({ \
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extern char *__kfence_pool; \
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(unlikely(__kfence_pool == NULL)) ? __va((unsigned long)paddr) : \
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page_address(phys_to_page((unsigned long)paddr)) + offset_in_page((unsigned long)paddr);\
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})
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#endif
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#include <asm-generic/io.h>
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#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
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extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
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extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
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#endif /* _ASM_IO_H */
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