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Add architectural preparation for AVEC irqchip, including: 1. CPUCFG feature bits definition for AVEC; 2. Detection of AVEC irqchip in cpu_probe(); 3. New IPI type definition (IPI_CLEAR_VECTOR) for AVEC; 4. Provide arch_probe_nr_irqs() for large NR_IRQS; 5. Other related changes about the number of interrupts. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240823103936.25092-2-zhangtianyang@loongson.cn
34 lines
706 B
C
34 lines
706 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#ifndef _ASM_HARDIRQ_H
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#define _ASM_HARDIRQ_H
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#include <linux/cache.h>
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#include <linux/threads.h>
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#include <linux/irq.h>
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extern void ack_bad_irq(unsigned int irq);
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#define ack_bad_irq ack_bad_irq
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#define NR_IPI 4
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enum ipi_msg_type {
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IPI_RESCHEDULE,
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IPI_CALL_FUNCTION,
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IPI_IRQ_WORK,
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IPI_CLEAR_VECTOR,
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};
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typedef struct {
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unsigned int ipi_irqs[NR_IPI];
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unsigned int __softirq_pending;
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atomic_t message ____cacheline_aligned_in_smp;
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} ____cacheline_aligned irq_cpustat_t;
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DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
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#define __ARCH_IRQ_STAT
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#endif /* _ASM_HARDIRQ_H */
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