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bf74bb73cd
Currently, LPA2 kernel support implies support for up to 52 bits of
physical addressing, and this is reflected in global definitions such as
PHYS_MASK_SHIFT and MAX_PHYSMEM_BITS.
This is potentially problematic, given that LPA2 hardware support is
modeled as a CPU feature which can be overridden, and with LPA2 hardware
support turned off, attempting to map physical regions with address bits
[51:48] set (which may exist on LPA2 capable systems booting with
arm64.nolva) will result in corrupted mappings with a truncated output
address and bogus shareability attributes.
This means that the accepted physical address range in the mapping
routines should be at most 48 bits wide when LPA2 support is configured
but not enabled at runtime.
Fixes: 352b0395b5 ("arm64: Enable 52-bit virtual addressing for 4k and 16k granule configs")
Cc: stable@vger.kernel.org
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20241212081841.2168124-9-ardb+git@google.com
Signed-off-by: Will Deacon <will@kernel.org>
32 lines
747 B
C
32 lines
747 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_SPARSEMEM_H
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#define __ASM_SPARSEMEM_H
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#include <asm/pgtable-prot.h>
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#define MAX_PHYSMEM_BITS PHYS_MASK_SHIFT
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#define MAX_POSSIBLE_PHYSMEM_BITS (52)
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/*
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* Section size must be at least 512MB for 64K base
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* page size config. Otherwise it will be less than
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* MAX_PAGE_ORDER and the build process will fail.
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*/
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#ifdef CONFIG_ARM64_64K_PAGES
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#define SECTION_SIZE_BITS 29
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#else
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/*
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* Section size must be at least 128MB for 4K base
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* page size config. Otherwise PMD based huge page
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* entries could not be created for vmemmap mappings.
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* 16K follows 4K for simplicity.
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*/
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#define SECTION_SIZE_BITS 27
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#endif /* CONFIG_ARM64_64K_PAGES */
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#endif
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