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65c430906e
GCC appears to have kind of fragile inlining heuristics, in the sense that it can change whether or not it inlines something based on optimizations. It looks like the kcov instrumentation being added (or in this case, removed) from a function changes the optimization results, and some functions marked "inline" are _not_ inlined. In that case, we end up with __init code calling a function not marked __init, and we get the build warnings I'm trying to eliminate in the coming patch that adds __no_sanitize_coverage to __init functions: WARNING: modpost: vmlinux: section mismatch in reference: acpi_get_enable_method+0x1c (section: .text.unlikely) -> acpi_psci_present (section: .init.text) This problem is somewhat fragile (though using either __always_inline or __init will deterministically solve it), but we've tripped over this before with GCC and the solution has usually been to just use __always_inline and move on. For arm64 this requires forcing one ACPI function to be inlined with __always_inline. Link: https://lore.kernel.org/r/20250724055029.3623499-1-kees@kernel.org Signed-off-by: Kees Cook <kees@kernel.org>
191 lines
5.5 KiB
C
191 lines
5.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2013-2014, Linaro Ltd.
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* Author: Al Stone <al.stone@linaro.org>
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* Author: Graeme Gregory <graeme.gregory@linaro.org>
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* Author: Hanjun Guo <hanjun.guo@linaro.org>
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*/
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#ifndef _ASM_ACPI_H
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#define _ASM_ACPI_H
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#include <linux/cpuidle.h>
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#include <linux/efi.h>
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#include <linux/memblock.h>
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#include <linux/psci.h>
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#include <linux/stddef.h>
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#include <asm/cputype.h>
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#include <asm/io.h>
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#include <asm/ptrace.h>
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#include <asm/smp_plat.h>
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#include <asm/tlbflush.h>
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/* Macros for consistency checks of the GICC subtable of MADT */
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/*
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* MADT GICC minimum length refers to the MADT GICC structure table length as
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* defined in the earliest ACPI version supported on arm64, ie ACPI 5.1.
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*
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* The efficiency_class member was added to the
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* struct acpi_madt_generic_interrupt to represent the MADT GICC structure
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* "Processor Power Efficiency Class" field, added in ACPI 6.0 whose offset
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* is therefore used to delimit the MADT GICC structure minimum length
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* appropriately.
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*/
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#define ACPI_MADT_GICC_MIN_LENGTH offsetof( \
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struct acpi_madt_generic_interrupt, efficiency_class)
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#define BAD_MADT_GICC_ENTRY(entry, end) \
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(!(entry) || (entry)->header.length < ACPI_MADT_GICC_MIN_LENGTH || \
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(unsigned long)(entry) + (entry)->header.length > (end))
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#define ACPI_MADT_GICC_SPE (offsetof(struct acpi_madt_generic_interrupt, \
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spe_interrupt) + sizeof(u16))
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#define ACPI_MADT_GICC_TRBE (offsetof(struct acpi_madt_generic_interrupt, \
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trbe_interrupt) + sizeof(u16))
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/*
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* Arm® Functional Fixed Hardware Specification Version 1.2.
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* Table 2: Arm Architecture context loss flags
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*/
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#define CPUIDLE_CORE_CTXT BIT(0) /* Core context Lost */
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static inline unsigned int arch_get_idle_state_flags(u32 arch_flags)
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{
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if (arch_flags & CPUIDLE_CORE_CTXT)
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return CPUIDLE_FLAG_TIMER_STOP;
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return 0;
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}
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#define arch_get_idle_state_flags arch_get_idle_state_flags
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#define CPUIDLE_TRACE_CTXT BIT(1) /* Trace context loss */
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#define CPUIDLE_GICR_CTXT BIT(2) /* GICR */
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#define CPUIDLE_GICD_CTXT BIT(3) /* GICD */
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/* Basic configuration for ACPI */
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#ifdef CONFIG_ACPI
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pgprot_t __acpi_get_mem_attribute(phys_addr_t addr);
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/* ACPI table mapping after acpi_permanent_mmap is set */
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void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
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#define acpi_os_ioremap acpi_os_ioremap
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typedef u64 phys_cpuid_t;
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#define PHYS_CPUID_INVALID INVALID_HWID
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#define acpi_strict 1 /* No out-of-spec workarounds on ARM64 */
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extern int acpi_disabled;
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extern int acpi_noirq;
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extern int acpi_pci_disabled;
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static inline void disable_acpi(void)
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{
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acpi_disabled = 1;
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acpi_pci_disabled = 1;
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acpi_noirq = 1;
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}
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static inline void enable_acpi(void)
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{
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acpi_disabled = 0;
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acpi_pci_disabled = 0;
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acpi_noirq = 0;
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}
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/*
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* The ACPI processor driver for ACPI core code needs this macro
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* to find out this cpu was already mapped (mapping from CPU hardware
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* ID to CPU logical ID) or not.
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*/
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#define cpu_physical_id(cpu) cpu_logical_map(cpu)
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/*
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* It's used from ACPI core in kdump to boot UP system with SMP kernel,
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* with this check the ACPI core will not override the CPU index
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* obtained from GICC with 0 and not print some error message as well.
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* Since MADT must provide at least one GICC structure for GIC
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* initialization, CPU will be always available in MADT on ARM64.
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*/
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static inline bool acpi_has_cpu_in_madt(void)
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{
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return true;
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}
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struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu);
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static inline u32 get_acpi_id_for_cpu(unsigned int cpu)
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{
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return acpi_cpu_get_madt_gicc(cpu)->uid;
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}
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static inline int get_cpu_for_acpi_id(u32 uid)
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{
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int cpu;
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for (cpu = 0; cpu < nr_cpu_ids; cpu++)
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if (acpi_cpu_get_madt_gicc(cpu) &&
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uid == get_acpi_id_for_cpu(cpu))
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return cpu;
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return -EINVAL;
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}
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static inline void arch_fix_phys_package_id(int num, u32 slot) { }
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void __init acpi_init_cpus(void);
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int apei_claim_sea(struct pt_regs *regs);
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#else
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static inline void acpi_init_cpus(void) { }
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static inline int apei_claim_sea(struct pt_regs *regs) { return -ENOENT; }
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#endif /* CONFIG_ACPI */
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#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
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bool acpi_parking_protocol_valid(int cpu);
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void __init
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acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor);
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#else
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static inline bool acpi_parking_protocol_valid(int cpu) { return false; }
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static inline void
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acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)
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{}
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#endif
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static __always_inline const char *acpi_get_enable_method(int cpu)
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{
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if (acpi_psci_present())
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return "psci";
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if (acpi_parking_protocol_valid(cpu))
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return "parking-protocol";
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return NULL;
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}
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#ifdef CONFIG_ACPI_APEI
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/*
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* acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
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* IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
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* with a kernel command line parameter "acpi=nocmcoff". But we don't
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* have this IA-32 specific feature on ARM64, this definition is only
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* for compatibility.
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*/
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#define acpi_disable_cmcff 1
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static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
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{
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return __acpi_get_mem_attribute(addr);
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}
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#endif /* CONFIG_ACPI_APEI */
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#ifdef CONFIG_ACPI_NUMA
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int arm64_acpi_numa_init(void);
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int acpi_numa_get_nid(unsigned int cpu);
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void acpi_map_cpus_to_nodes(void);
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#else
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static inline int arm64_acpi_numa_init(void) { return -ENOSYS; }
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static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
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static inline void acpi_map_cpus_to_nodes(void) { }
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#endif /* CONFIG_ACPI_NUMA */
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#define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE
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#endif /*_ASM_ACPI_H*/
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