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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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715dc11c78
Add PDM micphone sound card support, configure the pinmux. This sound card supports recording sound from PDM microphone and convert the PDM format data to PCM data. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
627 lines
14 KiB
Text
627 lines
14 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2024-2025 NXP
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*/
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/dts-v1/;
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#include "imx943.dtsi"
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/ {
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compatible = "fsl,imx943-evk", "fsl,imx94";
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model = "NXP i.MX943 EVK board";
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aliases {
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i2c2 = &lpi2c3;
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i2c3 = &lpi2c4;
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i2c5 = &lpi2c6;
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mmc0 = &usdhc1;
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mmc1 = &usdhc2;
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serial0 = &lpuart1;
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};
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bt_sco_codec: bt-sco-codec {
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compatible = "linux,bt-sco";
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#sound-dai-cells = <1>;
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};
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chosen {
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stdout-path = &lpuart1;
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};
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dmic: dmic {
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compatible = "dmic-codec";
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#sound-dai-cells = <0>;
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};
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reg_usdhc2_vmmc: regulator-usdhc2 {
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compatible = "regulator-fixed";
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off-on-delay-us = <12000>;
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pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
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pinctrl-names = "default";
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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regulator-name = "VDD_SD2_3V3";
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gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_audio_pwr: regulator-wm8962-pwr {
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compatible = "regulator-fixed";
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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regulator-name = "audio-pwr";
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gpio = <&pcal6416_i2c3_u171 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reserved-memory {
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ranges;
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#address-cells = <2>;
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#size-cells = <2>;
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linux,cma {
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compatible = "shared-dma-pool";
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alloc-ranges = <0 0x80000000 0 0x7f000000>;
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reusable;
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size = <0 0x10000000>;
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linux,cma-default;
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};
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};
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sound-bt-sco {
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compatible = "simple-audio-card";
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simple-audio-card,bitclock-inversion;
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simple-audio-card,bitclock-master = <&btcpu>;
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simple-audio-card,format = "dsp_a";
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simple-audio-card,frame-master = <&btcpu>;
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simple-audio-card,name = "bt-sco-audio";
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simple-audio-card,codec {
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sound-dai = <&bt_sco_codec 1>;
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};
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btcpu: simple-audio-card,cpu {
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dai-tdm-slot-num = <2>;
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dai-tdm-slot-width = <16>;
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sound-dai = <&sai3>;
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};
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};
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sound-micfil {
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compatible = "fsl,imx-audio-card";
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model = "micfil-audio";
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pri-dai-link {
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format = "i2s";
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link-name = "micfil hifi";
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codec {
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sound-dai = <&dmic>;
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};
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cpu {
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sound-dai = <&micfil>;
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};
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};
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};
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sound-wm8962 {
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compatible = "fsl,imx-audio-wm8962";
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audio-codec = <&wm8962>;
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audio-cpu = <&sai1>;
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audio-routing = "Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"Ext Spk", "SPKOUTL",
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"Ext Spk", "SPKOUTR",
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"AMIC", "MICBIAS",
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"IN3R", "AMIC",
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"IN1R", "AMIC";
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hp-det-gpio = <&pcal6416_i2c3_u48 14 GPIO_ACTIVE_HIGH>;
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model = "wm8962-audio";
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};
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memory@80000000 {
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reg = <0x0 0x80000000 0x0 0x80000000>;
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device_type = "memory";
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};
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};
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&lpi2c3 {
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clock-frequency = <400000>;
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pinctrl-0 = <&pinctrl_lpi2c3>;
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pinctrl-names = "default";
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status = "okay";
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pca9670_i2c3: gpio@23 {
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compatible = "nxp,pca9670";
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reg = <0x23>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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pca9548_i2c3: i2c-mux@77 {
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compatible = "nxp,pca9548";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c@2 {
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reg = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c@3 {
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reg = <3>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c@4 {
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reg = <4>;
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#address-cells = <1>;
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#size-cells = <0>;
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wm8962: codec@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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clocks = <&scmi_clk IMX94_CLK_SAI1>;
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AVDD-supply = <®_audio_pwr>;
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CPVDD-supply = <®_audio_pwr>;
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DBVDD-supply = <®_audio_pwr>;
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DCVDD-supply = <®_audio_pwr>;
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gpio-cfg = <
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0x0000 /* 0:Default */
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0x0000 /* 1:Default */
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0x0000 /* 2:FN_DMICCLK */
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0x0000 /* 3:Default */
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0x0000 /* 4:FN_DMICCDAT */
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0x0000 /* 5:Default */
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>;
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MICVDD-supply = <®_audio_pwr>;
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PLLVDD-supply = <®_audio_pwr>;
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SPKVDD1-supply = <®_audio_pwr>;
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SPKVDD2-supply = <®_audio_pwr>;
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};
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};
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i2c@5 {
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reg = <5>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcal6416_i2c3_u46: gpio@20 {
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compatible = "nxp,pcal6416";
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reg = <0x20>;
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#gpio-cells = <2>;
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gpio-controller;
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sd-card-on-hog {
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gpios = <13 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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output-high;
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};
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};
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pcal6416_i2c3_u171: gpio@21 {
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compatible = "nxp,pcal6416";
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reg = <0x21>;
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#gpio-cells = <2>;
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gpio-controller;
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audio-pwren-hog {
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gpios = <12 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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output-high;
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};
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mqs-mic-sel-hog {
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gpios = <11 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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output-low;
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};
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};
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};
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i2c@6 {
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reg = <6>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcal6416_i2c3_u48: gpio@20 {
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compatible = "nxp,pcal6416";
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reg = <0x20>;
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#interrupt-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gpio3>;
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interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
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#gpio-cells = <2>;
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gpio-controller;
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pinctrl-0 = <&pinctrl_ioexpander_int>;
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pinctrl-names = "default";
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};
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};
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i2c@7 {
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reg = <7>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcal6408_i2c3_u172: gpio@20 {
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compatible = "nxp,pcal6408";
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reg = <0x20>;
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#interrupt-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gpio3>;
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/* shared int pin with u48 */
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interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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};
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};
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};
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&lpi2c4 {
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clock-frequency = <400000>;
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pinctrl-0 = <&pinctrl_lpi2c4>;
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pinctrl-names = "default";
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status = "okay";
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};
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&lpi2c6 {
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clock-frequency = <400000>;
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pinctrl-0 = <&pinctrl_lpi2c6>;
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pinctrl-names = "default";
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status = "okay";
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pca9544_i2c6: i2c-mux@77 {
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compatible = "nxp,pca9544";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcal6416_i2c6_u50: gpio@21 {
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compatible = "nxp,pcal6416";
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reg = <0x21>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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};
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i2c@2 {
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reg = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcal6408_i2c6_u170: gpio@20 {
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compatible = "nxp,pcal6408";
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reg = <0x20>;
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#interrupt-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gpio4>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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#gpio-cells = <2>;
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gpio-controller;
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pinctrl-0 = <&pinctrl_ioexpander_int2>;
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pinctrl-names = "default";
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};
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};
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i2c@3 {
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reg = <3>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcal6416_i2c6_u44: gpio@20 {
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compatible = "nxp,pcal6416";
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reg = <0x20>;
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#gpio-cells = <2>;
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gpio-controller;
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/* pdm selection */
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can-pdm-sel-hog {
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gpios = <12 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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output-low;
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};
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sai3-sel-hog {
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gpios = <11 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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output-high;
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};
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/* eMMC IOMUX selection */
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sd1-sel-hog {
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gpios = <0 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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output-high;
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};
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/* SD card IOMUX selection */
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sd2-sel-hog {
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gpios = <1 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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output-high;
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};
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};
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};
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};
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};
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&lpuart1 {
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pinctrl-0 = <&pinctrl_uart1>;
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pinctrl-names = "default";
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status = "okay";
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};
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&micfil {
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assigned-clocks = <&scmi_clk IMX94_CLK_AUDIOPLL1_VCO>,
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<&scmi_clk IMX94_CLK_AUDIOPLL2_VCO>,
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<&scmi_clk IMX94_CLK_AUDIOPLL1>,
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<&scmi_clk IMX94_CLK_AUDIOPLL2>,
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<&scmi_clk IMX94_CLK_PDM>;
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assigned-clock-parents = <0>, <0>, <0>, <0>,
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<&scmi_clk IMX94_CLK_AUDIOPLL1>;
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assigned-clock-rates = <3932160000>,
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<3612672000>, <393216000>,
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<361267200>, <49152000>;
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pinctrl-0 = <&pinctrl_pdm>;
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pinctrl-names = "default";
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status = "okay";
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};
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&sai1 {
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assigned-clocks = <&scmi_clk IMX94_CLK_AUDIOPLL1_VCO>,
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<&scmi_clk IMX94_CLK_AUDIOPLL2_VCO>,
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<&scmi_clk IMX94_CLK_AUDIOPLL1>,
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<&scmi_clk IMX94_CLK_AUDIOPLL2>,
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<&scmi_clk IMX94_CLK_SAI1>;
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assigned-clock-parents = <0>, <0>, <0>, <0>,
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<&scmi_clk IMX94_CLK_AUDIOPLL1>;
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assigned-clock-rates = <3932160000>,
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<3612672000>, <393216000>,
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<361267200>, <12288000>;
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pinctrl-0 = <&pinctrl_sai1>;
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pinctrl-names = "default";
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fsl,sai-mclk-direction-output;
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status = "okay";
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};
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&sai3 {
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assigned-clocks = <&scmi_clk IMX94_CLK_AUDIOPLL1_VCO>,
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<&scmi_clk IMX94_CLK_AUDIOPLL2_VCO>,
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<&scmi_clk IMX94_CLK_AUDIOPLL1>,
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<&scmi_clk IMX94_CLK_AUDIOPLL2>,
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<&scmi_clk IMX94_CLK_SAI3>;
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assigned-clock-parents = <0>, <0>, <0>, <0>,
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<&scmi_clk IMX94_CLK_AUDIOPLL1>;
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assigned-clock-rates = <3932160000>,
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<3612672000>, <393216000>,
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<361267200>, <12288000>;
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pinctrl-0 = <&pinctrl_sai3>;
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pinctrl-names = "default";
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fsl,sai-mclk-direction-output;
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status = "okay";
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};
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&scmi_iomuxc {
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pinctrl_ioexpander_int2: ioexpanderint2grp {
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fsl,pins = <
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IMX94_PAD_CCM_CLKO4__GPIO4_IO3 0x31e
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>;
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};
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pinctrl_ioexpander_int: ioexpanderintgrp {
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fsl,pins = <
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IMX94_PAD_GPIO_IO45__GPIO3_IO13 0x31e
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>;
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};
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pinctrl_lpi2c3: lpi2c3grp {
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fsl,pins = <
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IMX94_PAD_GPIO_IO16__LPI2C3_SDA 0x40000b9e
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IMX94_PAD_GPIO_IO17__LPI2C3_SCL 0x40000b9e
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>;
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};
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pinctrl_lpi2c4: lpi2c4grp {
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fsl,pins = <
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IMX94_PAD_GPIO_IO18__LPI2C4_SDA 0x40000b9e
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IMX94_PAD_GPIO_IO19__LPI2C4_SCL 0x40000b9e
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>;
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};
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pinctrl_lpi2c6: lpi2c6grp {
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fsl,pins = <
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IMX94_PAD_GPIO_IO29__LPI2C6_SDA 0x40000b9e
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IMX94_PAD_GPIO_IO28__LPI2C6_SCL 0x40000b9e
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>;
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};
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pinctrl_pdm: pdmgrp {
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fsl,pins = <
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IMX94_PAD_PDM_CLK__PDM_CLK 0x31e
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IMX94_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM0 0x31e
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IMX94_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM1 0x31e
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>;
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};
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pinctrl_sai1: sai1grp {
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fsl,pins = <
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IMX94_PAD_SAI1_TXFS__SAI1_TX_SYNC 0x31e
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IMX94_PAD_SAI1_TXC__SAI1_TX_BCLK 0x31e
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IMX94_PAD_SAI1_TXD0__SAI1_TX_DATA0 0x31e
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IMX94_PAD_SAI1_RXD0__SAI1_RX_DATA0 0x31e
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IMX94_PAD_I2C2_SDA__SAI1_MCLK 0x31e
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>;
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};
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pinctrl_sai3: sai3grp {
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fsl,pins = <
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IMX94_PAD_GPIO_IO42__SAI3_TX_BCLK 0x31e
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IMX94_PAD_GPIO_IO56__SAI3_TX_SYNC 0x31e
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IMX94_PAD_GPIO_IO46__SAI3_RX_DATA0 0x31e
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IMX94_PAD_GPIO_IO47__SAI3_TX_DATA0 0x31e
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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IMX94_PAD_UART1_TXD__LPUART1_TX 0x31e
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IMX94_PAD_UART1_RXD__LPUART1_RX 0x31e
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>;
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};
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pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
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fsl,pins = <
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IMX94_PAD_SD1_CLK__USDHC1_CLK 0x158e
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IMX94_PAD_SD1_CMD__USDHC1_CMD 0x138e
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IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x138e
|
|
IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x138e
|
|
IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x138e
|
|
IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x138e
|
|
IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x138e
|
|
IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x138e
|
|
IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x138e
|
|
IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x138e
|
|
IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x158e
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
|
|
fsl,pins = <
|
|
IMX94_PAD_SD1_CLK__USDHC1_CLK 0x15fe
|
|
IMX94_PAD_SD1_CMD__USDHC1_CMD 0x13fe
|
|
IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe
|
|
IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe
|
|
IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe
|
|
IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe
|
|
IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe
|
|
IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe
|
|
IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe
|
|
IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe
|
|
IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
IMX94_PAD_SD1_CLK__USDHC1_CLK 0x158e
|
|
IMX94_PAD_SD1_CMD__USDHC1_CMD 0x138e
|
|
IMX94_PAD_SD1_DATA0__USDHC1_DATA0 0x138e
|
|
IMX94_PAD_SD1_DATA1__USDHC1_DATA1 0x138e
|
|
IMX94_PAD_SD1_DATA2__USDHC1_DATA2 0x138e
|
|
IMX94_PAD_SD1_DATA3__USDHC1_DATA3 0x138e
|
|
IMX94_PAD_SD1_DATA4__USDHC1_DATA4 0x138e
|
|
IMX94_PAD_SD1_DATA5__USDHC1_DATA5 0x138e
|
|
IMX94_PAD_SD1_DATA6__USDHC1_DATA6 0x138e
|
|
IMX94_PAD_SD1_DATA7__USDHC1_DATA7 0x138e
|
|
IMX94_PAD_SD1_STROBE__USDHC1_STROBE 0x158e
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
|
fsl,pins = <
|
|
IMX94_PAD_SD2_CLK__USDHC2_CLK 0x158e
|
|
IMX94_PAD_SD2_CMD__USDHC2_CMD 0x138e
|
|
IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
|
|
IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
|
|
IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x138e
|
|
IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x138e
|
|
IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
|
fsl,pins = <
|
|
IMX94_PAD_SD2_CLK__USDHC2_CLK 0x15fe
|
|
IMX94_PAD_SD2_CMD__USDHC2_CMD 0x13fe
|
|
IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe
|
|
IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe
|
|
IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe
|
|
IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
|
|
IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
|
fsl,pins = <
|
|
IMX94_PAD_SD2_CD_B__GPIO4_IO20 0x31e
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
IMX94_PAD_SD2_CLK__USDHC2_CLK 0x158e
|
|
IMX94_PAD_SD2_CMD__USDHC2_CMD 0x138e
|
|
IMX94_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
|
|
IMX94_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
|
|
IMX94_PAD_SD2_DATA2__USDHC2_DATA2 0x138e
|
|
IMX94_PAD_SD2_DATA3__USDHC2_DATA3 0x138e
|
|
IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
|
|
>;
|
|
};
|
|
|
|
pinctrl_reg_usdhc2_vmmc: usdhc2regvmmcgrp {
|
|
fsl,pins = <
|
|
IMX94_PAD_SD2_RESET_B__GPIO4_IO27 0x31e
|
|
>;
|
|
};
|
|
};
|
|
|
|
&usdhc1 {
|
|
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
|
|
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
bus-width = <8>;
|
|
non-removable;
|
|
no-sdio;
|
|
no-sd;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc2 {
|
|
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
|
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
|
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
bus-width = <4>;
|
|
no-mmc;
|
|
no-sdio;
|
|
cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
|
|
vmmc-supply = <®_usdhc2_vmmc>;
|
|
status = "okay";
|
|
};
|
|
|
|
&wdog3 {
|
|
fsl,ext-reset-output;
|
|
status = "okay";
|
|
};
|