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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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6856b62dc8
In preparation for increasing the default VPU clocks to overdrive, configure the nominal values first to avoid running the nominal devices out of spec when imx8mp.dtsi is changed. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
110 lines
3.1 KiB
Text
110 lines
3.1 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2024 Pengutronix, Ahmad Fatoum <kernel@pengutronix.de>
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*/
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&clk {
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assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>,
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<&clk IMX8MP_CLK_A53_CORE>,
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<&clk IMX8MP_SYS_PLL3>,
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<&clk IMX8MP_CLK_NOC>,
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<&clk IMX8MP_CLK_NOC_IO>,
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<&clk IMX8MP_CLK_GIC>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_ARM_PLL_OUT>,
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<0>,
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<&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_SYS_PLL3_OUT>,
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<&clk IMX8MP_SYS_PLL1_800M>;
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assigned-clock-rates = <0>, <0>,
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<600000000>,
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<800000000>,
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<600000000>,
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<400000000>;
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fsl,operating-mode = "nominal";
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};
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&gpu2d {
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assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
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assigned-clock-rates = <800000000>;
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};
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&gpu3d {
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assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,
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<&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_SYS_PLL1_800M>;
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assigned-clock-rates = <800000000>, <800000000>;
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};
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&pgc_hdmimix {
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assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>,
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<&clk IMX8MP_CLK_HDMI_APB>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_SYS_PLL1_133M>;
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assigned-clock-rates = <400000000>, <133000000>;
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};
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&pgc_hsiomix {
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assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
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assigned-clock-rates = <400000000>;
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};
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&pgc_gpumix {
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assigned-clocks = <&clk IMX8MP_CLK_GPU_AXI>,
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<&clk IMX8MP_CLK_GPU_AHB>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL3_OUT>,
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<&clk IMX8MP_SYS_PLL3_OUT>;
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assigned-clock-rates = <600000000>, <300000000>;
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};
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&pgc_mlmix {
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assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
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<&clk IMX8MP_CLK_ML_AXI>,
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<&clk IMX8MP_CLK_ML_AHB>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_SYS_PLL1_800M>;
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assigned-clock-rates = <800000000>,
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<800000000>,
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<300000000>;
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};
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&media_blk_ctrl {
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assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
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<&clk IMX8MP_CLK_MEDIA_APB>,
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<&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
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<&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
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<&clk IMX8MP_CLK_MEDIA_ISP>,
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<&clk IMX8MP_VIDEO_PLL1>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_VIDEO_PLL1_OUT>,
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<&clk IMX8MP_VIDEO_PLL1_OUT>,
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<&clk IMX8MP_SYS_PLL1_800M>;
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assigned-clock-rates = <400000000>, <200000000>,
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<0>, <0>, <400000000>,
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<1039500000>;
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};
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&vpu_g1 {
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assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
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assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
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assigned-clock-rates = <600000000>;
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};
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&vpu_g2 {
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assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
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assigned-clock-rates = <500000000>;
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};
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&vpumix_blk_ctrl {
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assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
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assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
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assigned-clock-rates = <600000000>, <600000000>;
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};
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/delete-node/ &{noc_opp_table/opp-1000000000};
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