mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-09-18 22:14:16 +00:00
f19e5bb91d
There are external pullup resistors on the board and due to silicon
errata ERR050080 let's disable the internal ones to prevent any
unwanted behavior in case they wear out.
Fixes: 8668d8b2e6 ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
314 lines
7.2 KiB
Text
314 lines
7.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Copyright (C) 2019 Kontron Electronics GmbH
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*/
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#include "imx8mm.dtsi"
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/ {
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model = "Kontron SL i.MX8MM (N801X SOM)";
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compatible = "kontron,imx8mm-sl", "fsl,imx8mm";
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memory@40000000 {
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device_type = "memory";
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/*
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* There are multiple SoM flavors with different DDR sizes.
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* The smallest is 1GB. For larger sizes the bootloader will
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* update the reg property.
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*/
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reg = <0x0 0x40000000 0 0x80000000>;
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};
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chosen {
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stdout-path = &uart3;
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};
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};
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&A53_0 {
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cpu-supply = <®_vdd_arm>;
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};
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&A53_1 {
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cpu-supply = <®_vdd_arm>;
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};
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&A53_2 {
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cpu-supply = <®_vdd_arm>;
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};
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&A53_3 {
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cpu-supply = <®_vdd_arm>;
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};
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&ddrc {
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operating-points-v2 = <&ddrc_opp_table>;
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ddrc_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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};
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opp-750000000 {
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opp-hz = /bits/ 64 <750000000>;
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};
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};
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
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status = "okay";
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flash@0 {
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compatible = "mxicy,mx25r1635f", "jedec,spi-nor";
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spi-max-frequency = <80000000>;
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reg = <0>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x1e0000>;
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};
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partition@1e0000 {
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label = "env";
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reg = <0x1e0000 0x10000>;
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};
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partition@1f0000 {
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label = "env_redundant";
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reg = <0x1f0000 0x10000>;
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};
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};
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pca9450: pmic@25 {
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compatible = "nxp,pca9450a";
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reg = <0x25>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio1>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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reg_vdd_soc: BUCK1 {
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regulator-name = "+0V8_VDD_SOC (BUCK1)";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <850000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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nxp,dvs-run-voltage = <850000>;
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nxp,dvs-standby-voltage = <800000>;
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};
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reg_vdd_arm: BUCK2 {
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regulator-name = "+0V9_VDD_ARM (BUCK2)";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <950000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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nxp,dvs-run-voltage = <950000>;
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nxp,dvs-standby-voltage = <850000>;
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};
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reg_vdd_dram: BUCK3 {
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regulator-name = "+0V9_VDD_DRAM&PU (BUCK3)";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vdd_3v3: BUCK4 {
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regulator-name = "+3V3 (BUCK4)";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vdd_1v8: BUCK5 {
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regulator-name = "+1V8 (BUCK5)";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_nvcc_dram: BUCK6 {
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regulator-name = "+1V1_NVCC_DRAM (BUCK6)";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_nvcc_snvs: LDO1 {
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regulator-name = "+1V8_NVCC_SNVS (LDO1)";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vdd_snvs: LDO2 {
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regulator-name = "+0V8_VDD_SNVS (LDO2)";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vdda: LDO3 {
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regulator-name = "+1V8_VDDA (LDO3)";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vdd_phy: LDO4 {
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regulator-name = "+0V9_VDD_PHY (LDO4)";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_nvcc_sd: LDO5 {
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regulator-name = "NVCC_SD (LDO5)";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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};
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};
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&uart3 { /* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
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vmmc-supply = <®_vdd_3v3>;
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vqmmc-supply = <®_vdd_1v8>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
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MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
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MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
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MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000083
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MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000083
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>;
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};
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pinctrl_pmic: pmicgrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
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MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
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MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
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MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
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MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
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MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
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MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
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MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0
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MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0
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MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0
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MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0
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MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
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MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x190
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>;
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};
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pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
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MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
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MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
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MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
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MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
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MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
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MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4
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MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4
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MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4
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MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4
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MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
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MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x194
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>;
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};
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pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
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MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
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MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
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MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
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MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
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MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
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MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6
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MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6
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MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6
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MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6
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MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
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MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x196
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>;
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};
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
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>;
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};
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};
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