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ad5b6611e1
This patch adds support for NXP LS2081ARDB board which has LS2081A SoC. LS2081A SoC is 40-pin derivative of LS2088A SoC. From functional perspective both are same. Hence, LS2088a SoC dtsi file is included from LS2081ARDB dts. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Tao Yang <b31903@freescale.com> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
132 lines
1.8 KiB
Text
132 lines
1.8 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for NXP LS2081A RDB Board.
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*
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* Copyright 2017 NXP
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*
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* Priyanka Jain <priyanka.jain@nxp.com>
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*
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*/
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/dts-v1/;
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#include "fsl-ls2088a.dtsi"
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/ {
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model = "NXP Layerscape 2081A RDB Board";
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compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
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aliases {
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serial0 = &serial0;
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serial1 = &serial1;
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};
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chosen {
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stdout-path = "serial1:115200n8";
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};
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};
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&dspi {
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status = "okay";
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n25q512a: flash@0 {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <3000000>;
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reg = <0>;
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};
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};
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&esdhc {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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pca9547: mux@75 {
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compatible = "nxp,pca9547";
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reg = <0x75>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x1>;
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rtc@51 {
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compatible = "nxp,pcf2129";
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reg = <0x51>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2>;
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ina220@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <500>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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adt7481@4c {
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compatible = "adi,adt7461";
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reg = <0x4c>;
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};
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};
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};
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};
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&ifc {
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status = "disabled";
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};
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&qspi {
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status = "okay";
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s25fs512s0: flash@0 {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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s25fs512s1: flash@1 {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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spi-max-frequency = <20000000>;
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reg = <1>;
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};
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};
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&sata0 {
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status = "okay";
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};
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&sata1 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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