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f254ae62fb
Some boards have noise on the UART RX line when the UART pins are not connected to another device (such as an USB UART adapter). This can be addressed by using a pull up resistor. Not all boards may provide such a pull up resistor on the PCB so enable the SoC's pull-up on the UART RX and TX pads by default. This matches the default (from u-boot or SoC hardware) state for the pinmux configuration on these pads. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250329185855.854186-8-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
749 lines
16 KiB
Text
749 lines
16 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#include <dt-bindings/clock/amlogic,a1-pll-clkc.h>
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#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
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#include <dt-bindings/gpio/meson-a1-gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/meson-a1-power.h>
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#include <dt-bindings/reset/amlogic,meson-a1-reset.h>
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/ {
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compatible = "amlogic,a1";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a35";
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a35";
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reg = <0x0 0x1>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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l2: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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efuse: efuse {
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compatible = "amlogic,meson-gxbb-efuse";
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clocks = <&clkc_periphs CLKID_OTP>;
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#address-cells = <1>;
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#size-cells = <1>;
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secure-monitor = <&sm>;
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power-domains = <&pwrc PWRC_OTP_ID>;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x0 0x800000>;
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alignment = <0x0 0x400000>;
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linux,cma-default;
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};
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};
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sm: secure-monitor {
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compatible = "amlogic,meson-gxbb-sm";
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pwrc: power-controller {
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compatible = "amlogic,meson-a1-pwrc";
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#power-domain-cells = <1>;
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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spifc: spi@fd000400 {
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compatible = "amlogic,a1-spifc";
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reg = <0x0 0xfd000400 0x0 0x290>;
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clocks = <&clkc_periphs CLKID_SPIFC>;
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#address-cells = <1>;
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#size-cells = <0>;
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power-domains = <&pwrc PWRC_SPIFC_ID>;
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status = "disabled";
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};
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apb: bus@fe000000 {
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compatible = "simple-bus";
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reg = <0x0 0xfe000000 0x0 0x1000000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
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reset: reset-controller@0 {
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compatible = "amlogic,meson-a1-reset";
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reg = <0x0 0x0 0x0 0x8c>;
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#reset-cells = <1>;
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};
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periphs_pinctrl: pinctrl@400 {
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compatible = "amlogic,meson-a1-periphs-pinctrl";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gpio: bank@400 {
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reg = <0x0 0x0400 0x0 0x003c>,
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<0x0 0x0480 0x0 0x0118>;
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reg-names = "mux", "gpio";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&periphs_pinctrl 0 0 62>;
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};
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i2c0_f11_pins: i2c0-f11 {
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mux {
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groups = "i2c0_sck_f11",
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"i2c0_sda_f12";
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function = "i2c0";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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i2c0_f9_pins: i2c0-f9 {
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mux {
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groups = "i2c0_sck_f9",
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"i2c0_sda_f10";
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function = "i2c0";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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i2c1_x_pins: i2c1-x {
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mux {
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groups = "i2c1_sck_x",
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"i2c1_sda_x";
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function = "i2c1";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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i2c1_a_pins: i2c1-a {
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mux {
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groups = "i2c1_sck_a",
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"i2c1_sda_a";
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function = "i2c1";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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i2c2_x0_pins: i2c2-x0 {
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mux {
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groups = "i2c2_sck_x0",
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"i2c2_sda_x1";
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function = "i2c2";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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i2c2_x15_pins: i2c2-x15 {
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mux {
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groups = "i2c2_sck_x15",
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"i2c2_sda_x16";
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function = "i2c2";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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i2c2_a4_pins: i2c2-a4 {
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mux {
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groups = "i2c2_sck_a4",
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"i2c2_sda_a5";
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function = "i2c2";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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i2c2_a8_pins: i2c2-a8 {
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mux {
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groups = "i2c2_sck_a8",
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"i2c2_sda_a9";
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function = "i2c2";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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i2c3_x_pins: i2c3-x {
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mux {
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groups = "i2c3_sck_x",
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"i2c3_sda_x";
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function = "i2c3";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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i2c3_f_pins: i2c3-f {
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mux {
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groups = "i2c3_sck_f",
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"i2c3_sda_f";
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function = "i2c3";
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bias-pull-up;
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drive-strength-microamp = <3000>;
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};
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};
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uart_a_pins: uart-a {
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mux {
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groups = "uart_a_tx",
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"uart_a_rx";
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function = "uart_a";
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bias-pull-up;
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};
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};
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uart_a_cts_rts_pins: uart-a-cts-rts {
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mux {
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groups = "uart_a_cts",
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"uart_a_rts";
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function = "uart_a";
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bias-pull-down;
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};
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};
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pwm_a_pins1: pwm-a-pins1 {
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mux {
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groups = "pwm_a_x6";
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function = "pwm_a";
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};
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};
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pwm_a_pins2: pwm-a-pins2 {
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mux {
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groups = "pwm_a_x7";
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function = "pwm_a";
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};
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};
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pwm_a_pins3: pwm-a-pins3 {
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mux {
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groups = "pwm_a_f10";
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function = "pwm_a";
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};
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};
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pwm_a_pins4: pwm-a-pins4 {
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mux {
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groups = "pwm_a_f6";
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function = "pwm_a";
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};
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};
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pwm_a_pins5: pwm-a-pins5 {
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mux {
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groups = "pwm_a_a";
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function = "pwm_a";
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};
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};
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pwm_b_pins1: pwm-b-pins1 {
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mux {
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groups = "pwm_b_x";
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function = "pwm_b";
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};
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};
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pwm_b_pins2: pwm-b-pins2 {
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mux {
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groups = "pwm_b_f";
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function = "pwm_b";
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};
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};
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pwm_b_pins3: pwm-b-pins3 {
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mux {
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groups = "pwm_b_a";
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function = "pwm_b";
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};
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};
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pwm_c_pins1: pwm-c-pins1 {
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mux {
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groups = "pwm_c_x";
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function = "pwm_c";
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};
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};
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pwm_c_pins2: pwm-c-pins2 {
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mux {
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groups = "pwm_c_f3";
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function = "pwm_c";
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};
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};
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pwm_c_pins3: pwm-c-pins3 {
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mux {
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groups = "pwm_c_f8";
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function = "pwm_c";
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};
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};
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pwm_c_pins4: pwm-c-pins4 {
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mux {
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groups = "pwm_c_a";
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function = "pwm_c";
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};
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};
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pwm_d_pins1: pwm-d-pins1 {
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mux {
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groups = "pwm_d_x15";
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function = "pwm_d";
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};
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};
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pwm_d_pins2: pwm-d-pins2 {
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mux {
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groups = "pwm_d_x13";
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function = "pwm_d";
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};
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};
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pwm_d_pins3: pwm-d-pins3 {
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mux {
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groups = "pwm_d_x10";
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function = "pwm_d";
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};
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};
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pwm_d_pins4: pwm-d-pins4 {
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mux {
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groups = "pwm_d_f";
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function = "pwm_d";
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};
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};
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pwm_e_pins1: pwm-e-pins1 {
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mux {
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groups = "pwm_e_p";
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function = "pwm_e";
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};
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};
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pwm_e_pins2: pwm-e-pins2 {
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mux {
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groups = "pwm_e_x16";
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function = "pwm_e";
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};
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};
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pwm_e_pins3: pwm-e-pins3 {
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mux {
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groups = "pwm_e_x14";
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function = "pwm_e";
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};
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};
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pwm_e_pins4: pwm-e-pins4 {
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mux {
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groups = "pwm_e_x2";
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function = "pwm_e";
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};
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};
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pwm_e_pins5: pwm-e-pins5 {
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mux {
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groups = "pwm_e_f";
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function = "pwm_e";
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};
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};
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pwm_e_pins6: pwm-e-pins6 {
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mux {
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groups = "pwm_e_a";
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function = "pwm_e";
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};
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};
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pwm_f_pins1: pwm-f-pins1 {
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mux {
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groups = "pwm_f_b";
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function = "pwm_f";
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};
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};
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pwm_f_pins2: pwm-f-pins2 {
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mux {
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groups = "pwm_f_x";
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function = "pwm_f";
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};
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};
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pwm_f_pins3: pwm-f-pins3 {
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mux {
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groups = "pwm_f_f4";
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function = "pwm_f";
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};
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};
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pwm_f_pins4: pwm-f-pins4 {
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mux {
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groups = "pwm_f_f12";
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function = "pwm_f";
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};
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};
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sdio_pins: sdio {
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mux0 {
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groups = "sdcard_d0_x",
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"sdcard_d1_x",
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"sdcard_d2_x",
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"sdcard_d3_x",
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"sdcard_cmd_x";
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function = "sdcard";
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bias-pull-up;
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};
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mux1 {
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groups = "sdcard_clk_x";
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function = "sdcard";
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bias-disable;
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};
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};
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sdio_clk_gate_pins: sdio-clk-gate {
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mux {
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groups = "sdcard_clk_x";
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function = "sdcard";
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bias-pull-down;
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};
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};
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spifc_pins: spifc {
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mux {
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groups = "spif_mo",
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"spif_mi",
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"spif_clk",
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"spif_cs",
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"spif_hold_n",
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"spif_wp_n";
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function = "spif";
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};
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};
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};
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gpio_intc: interrupt-controller@440 {
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compatible = "amlogic,meson-a1-gpio-intc",
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"amlogic,meson-gpio-intc";
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reg = <0x0 0x0440 0x0 0x14>;
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interrupt-controller;
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#interrupt-cells = <2>;
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amlogic,channel-interrupts =
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<49 50 51 52 53 54 55 56>;
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};
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clkc_periphs: clock-controller@800 {
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compatible = "amlogic,a1-peripherals-clkc";
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reg = <0 0x800 0 0x104>;
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#clock-cells = <1>;
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clocks = <&clkc_pll CLKID_FCLK_DIV2>,
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<&clkc_pll CLKID_FCLK_DIV3>,
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<&clkc_pll CLKID_FCLK_DIV5>,
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<&clkc_pll CLKID_FCLK_DIV7>,
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<&clkc_pll CLKID_HIFI_PLL>,
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<&xtal>;
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clock-names = "fclk_div2", "fclk_div3",
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"fclk_div5", "fclk_div7",
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"hifi_pll", "xtal";
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};
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i2c0: i2c@1400 {
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compatible = "amlogic,meson-axg-i2c";
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status = "disabled";
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reg = <0x0 0x1400 0x0 0x20>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clkc_periphs CLKID_I2C_M_A>;
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power-domains = <&pwrc PWRC_I2C_ID>;
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};
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uart_AO: serial@1c00 {
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compatible = "amlogic,meson-a1-uart",
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"amlogic,meson-ao-uart";
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reg = <0x0 0x1c00 0x0 0x18>;
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interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>, <&xtal>, <&xtal>;
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clock-names = "xtal", "pclk", "baud";
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status = "disabled";
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};
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uart_AO_B: serial@2000 {
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compatible = "amlogic,meson-a1-uart",
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"amlogic,meson-ao-uart";
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reg = <0x0 0x2000 0x0 0x18>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>, <&xtal>, <&xtal>;
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clock-names = "xtal", "pclk", "baud";
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status = "disabled";
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};
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pwm_ab: pwm@2400 {
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compatible = "amlogic,meson-a1-pwm",
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"amlogic,meson-s4-pwm";
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reg = <0x0 0x2400 0x0 0x24>;
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#pwm-cells = <3>;
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clocks = <&clkc_periphs CLKID_PWM_A>,
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<&clkc_periphs CLKID_PWM_B>;
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power-domains = <&pwrc PWRC_I2C_ID>;
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status = "disabled";
|
|
};
|
|
|
|
pwm_cd: pwm@2800 {
|
|
compatible = "amlogic,meson-a1-pwm",
|
|
"amlogic,meson-s4-pwm";
|
|
reg = <0x0 0x2800 0x0 0x24>;
|
|
#pwm-cells = <3>;
|
|
clocks = <&clkc_periphs CLKID_PWM_C>,
|
|
<&clkc_periphs CLKID_PWM_D>;
|
|
power-domains = <&pwrc PWRC_I2C_ID>;
|
|
status = "disabled";
|
|
};
|
|
|
|
saradc: adc@2c00 {
|
|
compatible = "amlogic,meson-g12a-saradc",
|
|
"amlogic,meson-saradc";
|
|
reg = <0x0 0x2c00 0x0 0x48>;
|
|
#io-channel-cells = <1>;
|
|
power-domains = <&pwrc PWRC_I2C_ID>;
|
|
interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&xtal>,
|
|
<&clkc_periphs CLKID_SARADC_EN>,
|
|
<&clkc_periphs CLKID_SARADC>,
|
|
<&clkc_periphs CLKID_SARADC_SEL>;
|
|
clock-names = "clkin", "core",
|
|
"adc_clk", "adc_sel";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@5c00 {
|
|
compatible = "amlogic,meson-axg-i2c";
|
|
status = "disabled";
|
|
reg = <0x0 0x5c00 0x0 0x20>;
|
|
interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&clkc_periphs CLKID_I2C_M_B>;
|
|
power-domains = <&pwrc PWRC_I2C_ID>;
|
|
};
|
|
|
|
i2c2: i2c@6800 {
|
|
compatible = "amlogic,meson-axg-i2c";
|
|
status = "disabled";
|
|
reg = <0x0 0x6800 0x0 0x20>;
|
|
interrupts = <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&clkc_periphs CLKID_I2C_M_C>;
|
|
power-domains = <&pwrc PWRC_I2C_ID>;
|
|
};
|
|
|
|
i2c3: i2c@6c00 {
|
|
compatible = "amlogic,meson-axg-i2c";
|
|
status = "disabled";
|
|
reg = <0x0 0x6c00 0x0 0x20>;
|
|
interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&clkc_periphs CLKID_I2C_M_D>;
|
|
power-domains = <&pwrc PWRC_I2C_ID>;
|
|
};
|
|
|
|
usb2_phy1: phy@4000 {
|
|
compatible = "amlogic,a1-usb2-phy";
|
|
clocks = <&clkc_periphs CLKID_USB_PHY_IN>;
|
|
clock-names = "xtal";
|
|
reg = <0x0 0x4000 0x0 0x60>;
|
|
resets = <&reset RESET_USBPHY>;
|
|
reset-names = "phy";
|
|
#phy-cells = <0>;
|
|
power-domains = <&pwrc PWRC_USB_ID>;
|
|
};
|
|
|
|
cpu_temp: temperature-sensor@4c00 {
|
|
compatible = "amlogic,a1-cpu-thermal";
|
|
reg = <0x0 0x4c00 0x0 0x50>;
|
|
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clkc_periphs CLKID_TS>;
|
|
assigned-clocks = <&clkc_periphs CLKID_TS>;
|
|
assigned-clock-rates = <500000>;
|
|
#thermal-sensor-cells = <0>;
|
|
amlogic,ao-secure = <&sec_AO>;
|
|
power-domains = <&pwrc PWRC_I2C_ID>;
|
|
};
|
|
|
|
hwrng: rng@5118 {
|
|
compatible = "amlogic,meson-rng";
|
|
reg = <0x0 0x5118 0x0 0x4>;
|
|
power-domains = <&pwrc PWRC_OTP_ID>;
|
|
};
|
|
|
|
sec_AO: ao-secure@5a20 {
|
|
compatible = "amlogic,meson-gx-ao-secure", "syscon";
|
|
reg = <0x0 0x5a20 0x0 0x140>;
|
|
amlogic,has-chip-id;
|
|
};
|
|
|
|
pwm_ef: pwm@5400 {
|
|
compatible = "amlogic,meson-a1-pwm",
|
|
"amlogic,meson-s4-pwm";
|
|
reg = <0x0 0x5400 0x0 0x24>;
|
|
#pwm-cells = <3>;
|
|
clocks = <&clkc_periphs CLKID_PWM_E>,
|
|
<&clkc_periphs CLKID_PWM_F>;
|
|
power-domains = <&pwrc PWRC_I2C_ID>;
|
|
status = "disabled";
|
|
};
|
|
|
|
clkc_pll: pll-clock-controller@7c80 {
|
|
compatible = "amlogic,a1-pll-clkc";
|
|
reg = <0 0x7c80 0 0x18c>;
|
|
#clock-cells = <1>;
|
|
clocks = <&clkc_periphs CLKID_FIXPLL_IN>,
|
|
<&clkc_periphs CLKID_HIFIPLL_IN>;
|
|
clock-names = "fixpll_in", "hifipll_in";
|
|
};
|
|
|
|
sd_emmc: mmc@10000 {
|
|
compatible = "amlogic,meson-axg-mmc";
|
|
reg = <0x0 0x10000 0x0 0x800>;
|
|
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clkc_periphs CLKID_SD_EMMC_A>,
|
|
<&clkc_periphs CLKID_SD_EMMC>,
|
|
<&clkc_pll CLKID_FCLK_DIV2>;
|
|
clock-names = "core",
|
|
"clkin0",
|
|
"clkin1";
|
|
assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_SEL2>;
|
|
assigned-clock-parents = <&xtal>;
|
|
resets = <&reset RESET_SD_EMMC_A>;
|
|
power-domains = <&pwrc PWRC_SD_EMMC_ID>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usb: usb@fe004400 {
|
|
status = "disabled";
|
|
compatible = "amlogic,meson-a1-usb-ctrl";
|
|
reg = <0x0 0xfe004400 0x0 0xa0>;
|
|
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
clocks = <&clkc_periphs CLKID_USB_CTRL>,
|
|
<&clkc_periphs CLKID_USB_BUS>,
|
|
<&clkc_periphs CLKID_USB_CTRL_IN>;
|
|
clock-names = "usb_ctrl", "usb_bus", "xtal_usb_ctrl";
|
|
assigned-clocks = <&clkc_periphs CLKID_USB_BUS>;
|
|
assigned-clock-rates = <64000000>;
|
|
resets = <&reset RESET_USBCTRL>;
|
|
|
|
dr_mode = "otg";
|
|
|
|
phys = <&usb2_phy1>;
|
|
phy-names = "usb2-phy1";
|
|
|
|
dwc3: usb@ff400000 {
|
|
compatible = "snps,dwc3";
|
|
reg = <0x0 0xff400000 0x0 0x100000>;
|
|
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
|
|
dr_mode = "host";
|
|
snps,dis_u2_susphy_quirk;
|
|
snps,quirk-frame-length-adjustment = <0x20>;
|
|
snps,parkmode-disable-ss-quirk;
|
|
};
|
|
|
|
dwc2: usb@ff500000 {
|
|
compatible = "amlogic,meson-a1-usb", "snps,dwc2";
|
|
reg = <0x0 0xff500000 0x0 0x40000>;
|
|
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
|
|
phys = <&usb2_phy1>;
|
|
phy-names = "usb2-phy";
|
|
clocks = <&clkc_periphs CLKID_USB_PHY>;
|
|
clock-names = "otg";
|
|
dr_mode = "peripheral";
|
|
g-rx-fifo-size = <192>;
|
|
g-np-tx-fifo-size = <128>;
|
|
g-tx-fifo-size = <128 128 16 16 16>;
|
|
};
|
|
};
|
|
|
|
gic: interrupt-controller@ff901000 {
|
|
compatible = "arm,gic-400";
|
|
reg = <0x0 0xff901000 0x0 0x1000>,
|
|
<0x0 0xff902000 0x0 0x2000>,
|
|
<0x0 0xff904000 0x0 0x2000>,
|
|
<0x0 0xff906000 0x0 0x2000>;
|
|
interrupt-controller;
|
|
interrupts = <GIC_PPI 9
|
|
(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
|
|
#interrupt-cells = <3>;
|
|
#address-cells = <0>;
|
|
};
|
|
};
|
|
|
|
timer {
|
|
compatible = "arm,armv8-timer";
|
|
interrupts = <GIC_PPI 13
|
|
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
|
|
<GIC_PPI 14
|
|
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
|
|
<GIC_PPI 11
|
|
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
|
|
<GIC_PPI 10
|
|
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
|
|
};
|
|
|
|
xtal: xtal-clk {
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <24000000>;
|
|
clock-output-names = "xtal";
|
|
#clock-cells = <0>;
|
|
};
|
|
};
|