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f0911f2947
Add the device node and related header file for Amlogic A5 reset controller. Signed-off-by: Zelong Dong <zelong.dong@amlogic.com> Link: https://lore.kernel.org/r/20240918074211.8067-4-zelong.dong@amlogic.com Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com> Link: https://lore.kernel.org/r/20250411-a4-a5-reset-v6-3-89963278c686@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
70 lines
1.4 KiB
Text
70 lines
1.4 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
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*/
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#include "amlogic-a4-common.dtsi"
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#include "amlogic-a5-reset.h"
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#include <dt-bindings/power/amlogic,a5-pwrc.h>
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/ {
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x0>;
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enable-method = "psci";
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};
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cpu1: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x100>;
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enable-method = "psci";
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};
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cpu2: cpu@200 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x200>;
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enable-method = "psci";
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};
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cpu3: cpu@300 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x300>;
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enable-method = "psci";
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};
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};
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sm: secure-monitor {
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compatible = "amlogic,meson-gxbb-sm";
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pwrc: power-controller {
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compatible = "amlogic,a5-pwrc";
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#power-domain-cells = <1>;
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};
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};
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};
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&apb {
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reset: reset-controller@2000 {
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compatible = "amlogic,a5-reset",
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"amlogic,meson-s4-reset";
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reg = <0x0 0x2000 0x0 0x98>;
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#reset-cells = <1>;
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};
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gpio_intc: interrupt-controller@4080 {
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compatible = "amlogic,a5-gpio-intc",
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"amlogic,meson-gpio-intc";
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reg = <0x0 0x4080 0x0 0x20>;
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interrupt-controller;
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#interrupt-cells = <2>;
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amlogic,channel-interrupts =
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<10 11 12 13 14 15 16 17 18 19 20 21>;
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};
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};
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